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7871752687
llvm-svn: 194416
27 lines
783 B
Plaintext
27 lines
783 B
Plaintext
# RUN: not llvm-mc -disassemble -triple armv7 -show-encoding < %s 2>&1 | FileCheck %s
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# This file is checking encodings that are valid on some triples, but not on the
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# ARMv7 triple, probably because the relevant instruction is v8, though there
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# could be other reasons.
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# Would be vcvtt.f64.f16 d3, s1
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[0xe0 0x3b 0xb2 0xee]
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0xe0 0x3b 0xb2 0xee]
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# Would be vcvtb.f16.f64 s4, d1
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[0x41 0x2b 0xb3 0xee]
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x41 0x2b 0xb3 0xee]
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# Would be vcvtblt.f16.f64 s4, d1
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[0x41 0x2b 0xb3 0xbe]
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x41 0x2b 0xb3 0xbe]
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# Would be vmrs r0, mvfr2
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[0x10 0xa 0xf5 0xee]
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# CHECK: invalid instruction encoding
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# CHECK-NEXT: [0x10 0xa 0xf5 0xee]
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