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d2dcfbe217
X86 uses i8 for shift amounts. This code can fail on a 32-bit target if it runs after type legalization. This code was copied from AArch64 and modified for X86, but the shift amount wasn't changed to the correct type for X86. Fixes PR44812
25 lines
792 B
LLVM
25 lines
792 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i386-unknown-linux-gnu -mattr=cmov | FileCheck %s
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define <2 x i32> @foo(<2 x i32> %tmp) {
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; CHECK-LABEL: foo:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: leal 7(%eax), %ecx
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; CHECK-NEXT: testl %eax, %eax
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; CHECK-NEXT: cmovnsl %eax, %ecx
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; CHECK-NEXT: sarl $3, %ecx
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; CHECK-NEXT: movl $1717986919, %eax # imm = 0x66666667
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; CHECK-NEXT: imull {{[0-9]+}}(%esp)
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; CHECK-NEXT: movl %edx, %eax
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; CHECK-NEXT: shrl $31, %eax
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; CHECK-NEXT: sarl $2, %edx
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; CHECK-NEXT: addl %edx, %eax
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; CHECK-NEXT: movl %ecx, %edx
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; CHECK-NEXT: retl
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entry:
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%tmp1 = sdiv <2 x i32> %tmp, <i32 10, i32 8>
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ret <2 x i32> %tmp1
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}
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