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a1467f07ff
When we need to do an fp->int conversion using x87 instructions, we need to temporarily change the rounding mode to 0b11 and perform a store. To do this we save the old value of the fpcw to the stack, then set the fpcw to 0xc7f, do the store, then restore fpcw. But the 0xc7f value forces the exception mask bits 1. While this is what they would be in the default FP environment, as we move to support changing the FP environments, we shouldn't make this assumption. This patch changes the code to explicitly OR 0xc00 with the old value so that only the rounding mode is changed. Unfortunately, this requires two stack temporaries instead of one. One to hold the old value and one to hold the new value. Without two stack temporaries we would need an additional GPR. We already need one to do the OR operation in. This is similar to what gcc and icc do for this operation. Though they are both better at reusing the stack temporaries when there are multiple truncates in a function(or at least in a basic block) Differential Revision: https://reviews.llvm.org/D57788 llvm-svn: 354178
110 lines
3.1 KiB
LLVM
110 lines
3.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; An integer truncation to i1 should be done with an and instruction to make
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; sure only the LSBit survives. Test that this is the case both for a returned
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; value and as the operand of a branch.
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; RUN: llc < %s -mtriple=i686-unknown-linux-gnu | FileCheck %s
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define zeroext i1 @test1(i32 %X) nounwind {
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; CHECK-LABEL: test1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movb {{[0-9]+}}(%esp), %al
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; CHECK-NEXT: andb $1, %al
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; CHECK-NEXT: retl
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%Y = trunc i32 %X to i1
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ret i1 %Y
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}
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define i1 @test2(i32 %val, i32 %mask) nounwind {
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; CHECK-LABEL: test2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; CHECK-NEXT: btl %ecx, %eax
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; CHECK-NEXT: jae .LBB1_2
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; CHECK-NEXT: # %bb.1: # %ret_true
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; CHECK-NEXT: movb $1, %al
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; CHECK-NEXT: retl
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; CHECK-NEXT: .LBB1_2: # %ret_false
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: retl
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entry:
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%shifted = ashr i32 %val, %mask
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%anded = and i32 %shifted, 1
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%trunced = trunc i32 %anded to i1
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br i1 %trunced, label %ret_true, label %ret_false
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ret_true:
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ret i1 true
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ret_false:
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ret i1 false
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}
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define i32 @test3(i8* %ptr) nounwind {
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; CHECK-LABEL: test3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: testb $1, (%eax)
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; CHECK-NEXT: je .LBB2_2
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; CHECK-NEXT: # %bb.1: # %cond_true
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; CHECK-NEXT: movl $21, %eax
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; CHECK-NEXT: retl
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; CHECK-NEXT: .LBB2_2: # %cond_false
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: retl
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%val = load i8, i8* %ptr
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%tmp = trunc i8 %val to i1
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br i1 %tmp, label %cond_true, label %cond_false
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cond_true:
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ret i32 21
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cond_false:
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ret i32 42
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}
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define i32 @test4(i8* %ptr) nounwind {
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; CHECK-LABEL: test4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: testb $1, {{[0-9]+}}(%esp)
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; CHECK-NEXT: je .LBB3_2
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; CHECK-NEXT: # %bb.1: # %cond_true
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; CHECK-NEXT: movl $21, %eax
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; CHECK-NEXT: retl
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; CHECK-NEXT: .LBB3_2: # %cond_false
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: retl
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%tmp = ptrtoint i8* %ptr to i1
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br i1 %tmp, label %cond_true, label %cond_false
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cond_true:
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ret i32 21
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cond_false:
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ret i32 42
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}
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define i32 @test5(double %d) nounwind {
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; CHECK-LABEL: test5:
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; CHECK: # %bb.0:
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; CHECK-NEXT: subl $8, %esp
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; CHECK-NEXT: fldl {{[0-9]+}}(%esp)
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; CHECK-NEXT: fnstcw {{[0-9]+}}(%esp)
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; CHECK-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: orl $3072, %eax # imm = 0xC00
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; CHECK-NEXT: movw %ax, {{[0-9]+}}(%esp)
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; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
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; CHECK-NEXT: fistps {{[0-9]+}}(%esp)
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; CHECK-NEXT: fldcw {{[0-9]+}}(%esp)
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; CHECK-NEXT: testb $1, {{[0-9]+}}(%esp)
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; CHECK-NEXT: je .LBB4_2
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; CHECK-NEXT: # %bb.1: # %cond_true
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; CHECK-NEXT: movl $21, %eax
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; CHECK-NEXT: addl $8, %esp
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; CHECK-NEXT: retl
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; CHECK-NEXT: .LBB4_2: # %cond_false
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; CHECK-NEXT: movl $42, %eax
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; CHECK-NEXT: addl $8, %esp
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; CHECK-NEXT: retl
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%tmp = fptosi double %d to i1
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br i1 %tmp, label %cond_true, label %cond_false
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cond_true:
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ret i32 21
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cond_false:
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ret i32 42
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}
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