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c114be9a74
r220178. First, the creation routine doesn't insert prior to the terminator of the basic block provided, but really at the end of the basic block. Instead, get the terminator and insert before that. The next issue was that we need to ensure multiple PHI node entries for a single predecessor re-use the same cast instruction rather than creating new ones. All of the logic here was without tests previously. I've reduced and added a test case from the test suite that crashed without both of these fixes. llvm-svn: 220186
113 lines
3.0 KiB
LLVM
113 lines
3.0 KiB
LLVM
; RUN: opt < %s -jump-threading -S | FileCheck %s
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:128:128"
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target triple = "i386-apple-darwin7"
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; Test that we can thread through the block with the partially redundant load (%2).
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; rdar://6402033
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define i32 @test1(i32* %P) nounwind {
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; CHECK-LABEL: @test1(
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entry:
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%0 = tail call i32 (...)* @f1() nounwind ; <i32> [#uses=1]
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%1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
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br i1 %1, label %bb1, label %bb
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bb: ; preds = %entry
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; CHECK: bb1.thread:
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; CHECK: store
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; CHECK: br label %bb3
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store i32 42, i32* %P, align 4
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br label %bb1
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bb1: ; preds = %entry, %bb
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%res.0 = phi i32 [ 1, %bb ], [ 0, %entry ] ; <i32> [#uses=2]
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%2 = load i32* %P, align 4 ; <i32> [#uses=1]
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%3 = icmp sgt i32 %2, 36 ; <i1> [#uses=1]
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br i1 %3, label %bb3, label %bb2
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bb2: ; preds = %bb1
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%4 = tail call i32 (...)* @f2() nounwind ; <i32> [#uses=0]
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ret i32 %res.0
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bb3: ; preds = %bb1
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; CHECK: bb3:
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; CHECK: %res.01 = phi i32 [ 1, %bb1.thread ], [ 0, %bb1 ]
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; CHECK: ret i32 %res.01
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ret i32 %res.0
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}
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declare i32 @f1(...)
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declare i32 @f2(...)
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;; Check that we preserve TBAA information.
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; rdar://11039258
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define i32 @test2(i32* %P) nounwind {
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; CHECK-LABEL: @test2(
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entry:
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%0 = tail call i32 (...)* @f1() nounwind ; <i32> [#uses=1]
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%1 = icmp eq i32 %0, 0 ; <i1> [#uses=1]
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br i1 %1, label %bb1, label %bb
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bb: ; preds = %entry
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; CHECK: bb1.thread:
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; CHECK: store{{.*}}, !tbaa !0
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; CHECK: br label %bb3
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store i32 42, i32* %P, align 4, !tbaa !0
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br label %bb1
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bb1: ; preds = %entry, %bb
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%res.0 = phi i32 [ 1, %bb ], [ 0, %entry ]
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%2 = load i32* %P, align 4, !tbaa !0
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%3 = icmp sgt i32 %2, 36
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br i1 %3, label %bb3, label %bb2
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bb2: ; preds = %bb1
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%4 = tail call i32 (...)* @f2() nounwind
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ret i32 %res.0
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bb3: ; preds = %bb1
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; CHECK: bb3:
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; CHECK: %res.01 = phi i32 [ 1, %bb1.thread ], [ 0, %bb1 ]
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; CHECK: ret i32 %res.01
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ret i32 %res.0
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}
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define i32 @test3(i8** %x, i1 %f) {
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; Correctly thread loads of different (but compatible) types, placing bitcasts
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; as necessary in the predecessors. This is especially tricky because the same
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; predecessor ends up with two entries in the PHI node and they must share
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; a single cast.
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; CHECK-LABEL: @test3(
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entry:
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%0 = bitcast i8** %x to i32**
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%1 = load i32** %0, align 8
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br i1 %f, label %if.end57, label %if.then56
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; CHECK: %[[LOAD:.*]] = load i32**
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; CHECK: %[[CAST:.*]] = bitcast i32* %[[LOAD]] to i8*
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if.then56:
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br label %if.end57
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if.end57:
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%2 = load i8** %x, align 8
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%tobool59 = icmp eq i8* %2, null
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br i1 %tobool59, label %return, label %if.then60
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; CHECK: %[[PHI:.*]] = phi i8* [ %[[CAST]], %[[PRED:[^ ]+]] ], [ %[[CAST]], %[[PRED]] ]
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; CHECK-NEXT: %[[CMP:.*]] = icmp eq i8* %[[PHI]], null
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; CHECK-NEXT: br i1 %[[CMP]]
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if.then60:
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ret i32 42
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return:
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ret i32 13
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}
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!0 = metadata !{metadata !3, metadata !3, i64 0}
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!1 = metadata !{metadata !"omnipotent char", metadata !2}
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!2 = metadata !{metadata !"Simple C/C++ TBAA", null}
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!3 = metadata !{metadata !"int", metadata !1}
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