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llvm-mirror/lib/Target/AMDGPU
hsmahesha 0a487e92a9 AMDGPU/GlobalISel: Support llvm.trap and llvm.debugtrap intrinsics
Summary: Lower trap and debugtrap intrinsics to AMDGPU machine instruction(s).

Reviewers: arsenm, nhaehnle, kerbowa, cdevadas, t-tye, kzhuravl

Reviewed By: arsenm

Subscribers: kzhuravl, jvesely, wdng, yaxunl, rovka, dstuttard, tpr, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D74688
2020-03-05 08:16:57 +05:30
..
AsmParser [AMDGPU] Implement wave64 DWARF register mapping 2020-02-25 14:00:01 -05:00
Disassembler [AMDGPU] Remove AMDGPURegisterInfo 2020-02-11 11:13:38 -08:00
MCTargetDesc [MC] Add MCStreamer::emitInt{8,16,32,64} 2020-02-29 09:40:21 -08:00
TargetInfo CMake: Make most target symbols hidden by default 2020-01-14 19:46:52 -08:00
Utils [AMDGPU] Add a16 feature to gfx10 2020-02-10 09:04:23 +01:00
AMDGPU.h AMDGPU/GlobalISel: Introduce post-legalize combiner 2020-02-24 22:12:12 -05:00
AMDGPU.td [AMDGPU] Remove AMDGPURegisterInfo 2020-02-11 11:13:38 -08:00
AMDGPUAliasAnalysis.cpp
AMDGPUAliasAnalysis.h
AMDGPUAlwaysInlinePass.cpp
AMDGPUAnnotateKernelFeatures.cpp
AMDGPUAnnotateUniformValues.cpp
AMDGPUArgumentUsageInfo.cpp
AMDGPUArgumentUsageInfo.h
AMDGPUAsmPrinter.cpp [MC] Add MCStreamer::emitInt{8,16,32,64} 2020-02-29 09:40:21 -08:00
AMDGPUAsmPrinter.h [AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI* 2020-02-13 22:08:55 -08:00
AMDGPUAtomicOptimizer.cpp
AMDGPUCallingConv.td AMDGPU: Allow i16 shader arguments 2020-01-27 06:55:32 -08:00
AMDGPUCallLowering.cpp AMDGPU/GlobalISel: Don't use vector G_EXTRACT in arg lowering 2020-03-04 16:49:01 -05:00
AMDGPUCallLowering.h
AMDGPUCodeGenPrepare.cpp [IRBuilder] Avoid passing IRBuilder by value; NFC 2020-02-17 18:14:47 +01:00
AMDGPUCombine.td AMDGPU/GlobalISel: Introduce post-legalize combiner 2020-02-24 22:12:12 -05:00
AMDGPUFeatures.td
AMDGPUFixFunctionBitcasts.cpp
AMDGPUFrameLowering.cpp
AMDGPUFrameLowering.h [Alignment][NFC] Deprecate Align::None() 2020-01-24 12:53:58 +01:00
AMDGPUGenRegisterBankInfo.def AMDGPU/GlobalISel: Fix RegBankSelect for G_INSERT_VECTOR_ELT 2020-01-22 10:57:50 -05:00
AMDGPUGISel.td AMDGPU: Remove VOP3OpSelMods0 complex pattern 2020-03-04 17:18:22 -05:00
AMDGPUGlobalISelUtils.cpp AMDGPU/GlobalISel: Select G_SHUFFLE_VECTOR 2020-02-21 13:35:40 -05:00
AMDGPUGlobalISelUtils.h AMDGPU/GlobalISel: Select G_SHUFFLE_VECTOR 2020-02-21 13:35:40 -05:00
AMDGPUHSAMetadataStreamer.cpp Make llvm::StringRef to std::string conversions explicit. 2020-01-28 23:25:25 +01:00
AMDGPUHSAMetadataStreamer.h
AMDGPUInline.cpp [Inliner] Inlining should honor nobuiltin attributes 2020-02-28 07:34:14 -08:00
AMDGPUInstrInfo.cpp [AMDGPU] Remove AMDGPURegisterInfo 2020-02-11 11:13:38 -08:00
AMDGPUInstrInfo.h
AMDGPUInstrInfo.td AMDGPU/GlobalISel: Select llvm.amdgcn.fdot2 2020-02-21 13:35:40 -05:00
AMDGPUInstructions.td AMDGPU: Split denormal mode tracking bits 2020-02-04 10:44:21 -08:00
AMDGPUInstructionSelector.cpp AMDGPU: Remove VOP3OpSelMods0 complex pattern 2020-03-04 17:18:22 -05:00
AMDGPUInstructionSelector.h AMDGPU: Remove VOP3OpSelMods0 complex pattern 2020-03-04 17:18:22 -05:00
AMDGPUISelDAGToDAG.cpp AMDGPU: Remove VOP3OpSelMods0 complex pattern 2020-03-04 17:18:22 -05:00
AMDGPUISelLowering.cpp [AMDGPU] simplifyI24 - replace GetDemandedBits with SimplifyMultipleUseDemandedBits 2020-02-20 12:03:08 +00:00
AMDGPUISelLowering.h [TargetLowering] Add NegatibleCost enum for isNegatibleForFree return codes 2020-02-12 11:51:42 +00:00
AMDGPULegalizerInfo.cpp AMDGPU/GlobalISel: Support llvm.trap and llvm.debugtrap intrinsics 2020-03-05 08:16:57 +05:30
AMDGPULegalizerInfo.h AMDGPU/GlobalISel: Support llvm.trap and llvm.debugtrap intrinsics 2020-03-05 08:16:57 +05:30
AMDGPULibCalls.cpp Make llvm::StringRef to std::string conversions explicit. 2020-01-28 23:25:25 +01:00
AMDGPULibFunc.cpp Make llvm::StringRef to std::string conversions explicit. 2020-01-28 23:25:25 +01:00
AMDGPULibFunc.h Make llvm::StringRef to std::string conversions explicit. 2020-01-28 23:25:25 +01:00
AMDGPULowerIntrinsics.cpp AMDGPU: Add flag to control mem intrinsic expansion 2020-02-03 14:26:01 -08:00
AMDGPULowerKernelArguments.cpp [Alignement][NFC] Deprecate untyped CreateAlignedLoad 2020-01-23 13:34:32 +01:00
AMDGPULowerKernelAttributes.cpp
AMDGPUMachineCFGStructurizer.cpp [AMDGPU] Fixes -Wrange-loop-analysis warnings 2019-12-22 19:39:28 +01:00
AMDGPUMachineFunction.cpp
AMDGPUMachineFunction.h
AMDGPUMachineModuleInfo.cpp
AMDGPUMachineModuleInfo.h
AMDGPUMacroFusion.cpp
AMDGPUMacroFusion.h
AMDGPUMCInstLower.cpp [AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI* 2020-02-13 22:08:55 -08:00
AMDGPUOpenCLEnqueuedBlockLowering.cpp Avoid SmallString.h include in MD5.h, NFC 2020-02-26 09:10:24 -08:00
AMDGPUPerfHintAnalysis.cpp
AMDGPUPerfHintAnalysis.h
AMDGPUPostLegalizerCombiner.cpp AMDGPU/GlobalISel: Introduce post-legalize combiner 2020-02-24 22:12:12 -05:00
AMDGPUPreLegalizerCombiner.cpp AMDGPU/GlobalISel: Introduce post-legalize combiner 2020-02-24 22:12:12 -05:00
AMDGPUPrintfRuntimeBinding.cpp
AMDGPUPromoteAlloca.cpp [Alignement][NFC] Deprecate untyped CreateAlignedLoad 2020-01-23 13:34:32 +01:00
AMDGPUPropagateAttributes.cpp Make llvm::StringRef to std::string conversions explicit. 2020-01-28 23:25:25 +01:00
AMDGPUPTNote.h
AMDGPURegisterBankInfo.cpp AMDGPU/GlobalISel: Fix SALU mapping for v2s16 min/max 2020-02-21 14:02:16 -05:00
AMDGPURegisterBankInfo.h AMDGPU/GlobalISel: Handle sbfe/ubfe intrinsic 2020-02-17 09:20:13 -05:00
AMDGPURegisterBanks.td AMDGPU/GlobalISel: Replace handling of boolean values 2020-01-06 18:26:42 -05:00
AMDGPURewriteOutArguments.cpp [Alignment][NFC] Use Align with CreateAlignedStore 2020-01-23 17:34:32 +01:00
AMDGPUSearchableTables.td AMDGPU: llvm.amdgcn.writelane is a source of divergence 2020-02-12 09:12:56 +01:00
AMDGPUSubtarget.cpp AMDGPU: Fix computation for getOccupancyWithLocalMemSize 2020-03-03 17:15:57 -05:00
AMDGPUSubtarget.h [AMDGPU] Add a16 feature to gfx10 2020-02-10 09:04:23 +01:00
AMDGPUTargetMachine.cpp AMDGPU/GlobalISel: Introduce post-legalize combiner 2020-02-24 22:12:12 -05:00
AMDGPUTargetMachine.h
AMDGPUTargetObjectFile.cpp
AMDGPUTargetObjectFile.h
AMDGPUTargetTransformInfo.cpp [AMDGPU] Enable runtime unroll for LDS 2020-02-27 12:59:35 -08:00
AMDGPUTargetTransformInfo.h AMDGPU: Analyze divergence of inline asm 2020-02-03 12:42:16 -08:00
AMDGPUUnifyDivergentExitNodes.cpp AMDGPU: Fix AMDGPUUnifyDivergentExitNodes with no normal returns 2020-01-30 10:55:02 +01:00
AMDGPUUnifyMetadata.cpp [AMDGPU] Fixes -Wrange-loop-analysis warnings 2019-12-22 19:39:28 +01:00
AMDILCFGStructurizer.cpp
AMDKernelCodeT.h
BUFInstructions.td AMDGPU: Don't use separate cache arguments for s_buffer_load node 2020-01-30 14:15:26 -08:00
CaymanInstructions.td AMDGPU/EG,CM: Implement fsqrt using recip(rsqrt(x)) instead of x * rsqrt(x) 2020-02-05 00:24:07 -05:00
CMakeLists.txt AMDGPU/GlobalISel: Introduce post-legalize combiner 2020-02-24 22:12:12 -05:00
DSInstructions.td [AMDGPU] Fix DS_WRITE_B32 patterns 2020-02-19 13:42:16 -08:00
EvergreenInstructions.td AMDGPU/EG,CM: Implement fsqrt using recip(rsqrt(x)) instead of x * rsqrt(x) 2020-02-05 00:24:07 -05:00
FLATInstructions.td AMDGPU/GlobalISel: Fix not using global atomics on gfx9+ 2020-01-27 07:42:42 -08:00
GCNDPPCombine.cpp
GCNHazardRecognizer.cpp Make more use of MachineInstr::mayLoadOrStore. 2019-12-19 11:51:52 +00:00
GCNHazardRecognizer.h
GCNILPSched.cpp
GCNIterativeScheduler.cpp [AMDGPU] Add file headers for few files where it is missing. 2020-01-31 02:06:41 +05:30
GCNIterativeScheduler.h [AMDGPU] Add file headers for few files where it is missing. 2020-01-31 02:06:41 +05:30
GCNMinRegStrategy.cpp [AMDGPU] Add file headers for few files where it is missing. 2020-01-31 02:06:41 +05:30
GCNNSAReassign.cpp AMDGPU/GFX10: Fix NSA reassign pass when operands are undef 2020-02-01 22:41:40 +01:00
GCNProcessors.td
GCNRegBankReassign.cpp [AMDGPU] Cleanup assumptions about generated subregs 2020-02-06 17:39:24 -08:00
GCNRegPressure.cpp [AMDGPU] Fix assumption about LaneBitmask content 2020-02-19 09:07:11 -08:00
GCNRegPressure.h [AMDGPU] Add file headers for few files where it is missing. 2020-01-31 02:06:41 +05:30
GCNSchedStrategy.cpp [AMDGPU] Remove dubious logic in bidirectional list scheduler 2020-02-28 21:35:34 +00:00
GCNSchedStrategy.h [AMDGPU] Attempt to reschedule withou clustering 2020-01-27 10:27:16 -08:00
LLVMBuild.txt
MIMGInstructions.td [AMDGPU] Add a16 feature to gfx10 2020-02-10 09:04:23 +01:00
R600.td
R600AsmPrinter.cpp [MC] Add MCStreamer::emitInt{8,16,32,64} 2020-02-29 09:40:21 -08:00
R600AsmPrinter.h [AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI* 2020-02-13 22:08:55 -08:00
R600ClauseMergePass.cpp
R600ControlFlowFinalizer.cpp [AMDGPU] Split R600 and GCN subregs 2020-02-10 08:29:56 -08:00
R600Defines.h
R600EmitClauseMarkers.cpp
R600ExpandSpecialInstrs.cpp [AMDGPU] Split R600 and GCN subregs 2020-02-10 08:29:56 -08:00
R600FrameLowering.cpp
R600FrameLowering.h [Alignment][NFC] Deprecate Align::None() 2020-01-24 12:53:58 +01:00
R600InstrFormats.td
R600InstrInfo.cpp [AMDGPU] Split R600 and GCN subregs 2020-02-10 08:29:56 -08:00
R600InstrInfo.h
R600Instructions.td AMDGPU/EG,CM: Implement fsqrt using recip(rsqrt(x)) instead of x * rsqrt(x) 2020-02-05 00:24:07 -05:00
R600ISelLowering.cpp AMDGPU: Move R600 test compatability hack 2020-02-10 10:02:06 -08:00
R600ISelLowering.h
R600MachineFunctionInfo.cpp
R600MachineFunctionInfo.h
R600MachineScheduler.cpp
R600MachineScheduler.h
R600OpenCLImageTypeLoweringPass.cpp
R600OptimizeVectorRegisters.cpp
R600Packetizer.cpp
R600Processors.td
R600RegisterInfo.cpp [TBLGEN] Allow to override RC weight 2020-02-14 15:49:52 -08:00
R600RegisterInfo.h [TBLGEN] Allow to override RC weight 2020-02-14 15:49:52 -08:00
R600RegisterInfo.td [TBLGEN] Allow to override RC weight 2020-02-14 15:49:52 -08:00
R600Schedule.td
R700Instructions.td
SIAddIMGInit.cpp [AMDGPU] Split R600 and GCN subregs 2020-02-10 08:29:56 -08:00
SIAnnotateControlFlow.cpp AMDGPU: Fix extra type mangling on llvm.amdgcn.if.break 2020-02-03 07:02:05 -08:00
SIDefines.h
SIFixSGPRCopies.cpp AMDGPU/GlobalISel: Skip DAG hack passes on selected functions 2020-02-17 08:33:17 -08:00
SIFixupVectorISel.cpp AMDGPU/GlobalISel: Skip DAG hack passes on selected functions 2020-02-17 08:33:17 -08:00
SIFixVGPRCopies.cpp
SIFoldOperands.cpp AMDGPU: Split denormal mode tracking bits 2020-02-04 10:44:21 -08:00
SIFormMemoryClauses.cpp
SIFrameLowering.cpp Reapply "AMDGPU: Cleanup and fix SMRD offset handling" 2020-01-31 06:01:28 -08:00
SIFrameLowering.h [Alignment][NFC] Deprecate Align::None() 2020-01-24 12:53:58 +01:00
SIInsertSkips.cpp Full fix for "AMDGPU/SIInsertSkips: Fix the determination of whether early-exit-after-kill is possible" (hopefully) 2020-02-26 16:21:44 +01:00
SIInsertWaitcnts.cpp [AMDGPU] Fix vccz after v_readlane/v_readfirstlane to vcc_lo/hi 2020-01-28 10:52:17 +00:00
SIInstrFormats.td [AMDGPU] Add a16 feature to gfx10 2020-02-10 09:04:23 +01:00
SIInstrInfo.cpp Add OffsetIsScalable to getMemOperandWithOffset 2020-02-18 15:53:29 +00:00
SIInstrInfo.h Add OffsetIsScalable to getMemOperandWithOffset 2020-02-18 15:53:29 +00:00
SIInstrInfo.td AMDGPU: Remove VOP3OpSelMods0 complex pattern 2020-03-04 17:18:22 -05:00
SIInstructions.td AMDGPU: Fix v2i64<->v4f32 bitcast 2020-02-20 09:49:09 -05:00
SIISelLowering.cpp [AMDGPU] performCvtF32UByteNCombine - revisit node after src operand simplification. 2020-03-04 11:25:50 +00:00
SIISelLowering.h AMDGPU/GlobalISel: Allow arbitrary global values 2020-02-17 11:32:28 -08:00
SILoadStoreOptimizer.cpp [AMDGPU] Add a16 feature to gfx10 2020-02-10 09:04:23 +01:00
SILowerControlFlow.cpp AMDGPU: Fix SI_IF lowering when the save exec reg has terminator uses 2020-02-09 17:59:19 -05:00
SILowerI1Copies.cpp AMDGPU/GlobalISel: Skip DAG hack passes on selected functions 2020-02-17 08:33:17 -08:00
SILowerSGPRSpills.cpp ArrayRef'ize restoreCalleeSavedRegisters. NFCI. 2020-02-29 09:50:23 +01:00
SIMachineFunctionInfo.cpp
SIMachineFunctionInfo.h AMDGPU: Split denormal mode tracking bits 2020-02-04 10:44:21 -08:00
SIMachineScheduler.cpp [AMDGPU] Use generated RegisterPressureSets enum 2020-02-18 10:34:03 -08:00
SIMachineScheduler.h [AMDGPU] Use generated RegisterPressureSets enum 2020-02-18 10:34:03 -08:00
SIMemoryLegalizer.cpp [AMDGPU] Bundle loads before post-RA scheduler 2020-01-24 11:33:38 -08:00
SIModeRegister.cpp
SIOptimizeExecMasking.cpp AMDGPU: Use Register 2019-12-27 16:53:21 -05:00
SIOptimizeExecMaskingPreRA.cpp
SIPeepholeSDWA.cpp Fix unused function warning (PR44808) 2020-02-12 15:12:48 +01:00
SIPostRABundler.cpp [AMDGPU] Bundle loads before post-RA scheduler 2020-01-24 11:33:38 -08:00
SIPreAllocateWWMRegs.cpp
SIProgramInfo.h
SIRegisterInfo.cpp [AMDGPU] use llvm_unreachable instead of default for rp set 2020-02-24 12:02:12 -08:00
SIRegisterInfo.h [AMDGPU] Use generated RegisterPressureSets enum 2020-02-18 10:34:03 -08:00
SIRegisterInfo.td [AMDGPU] Implement wave64 DWARF register mapping 2020-02-25 14:00:01 -05:00
SIRemoveShortExecBranches.cpp [AMDGPU] Don't remove short branches over kills 2020-02-03 09:26:52 +00:00
SISchedule.td [AMDGPU] Mark the scheduling model as complete 2020-02-28 13:35:55 +00:00
SIShrinkInstructions.cpp AMDGPU: Limit the search in finding the instruction pattern for v_swap generation. 2020-02-07 11:06:33 -08:00
SIWholeQuadMode.cpp [AMDGPU] Fix non-deterministic iteration order 2020-02-11 09:19:30 +00:00
SMInstructions.td AMDGPU/GlobalISel: Select llvm.amdgcn.s.buffer.load 2020-02-17 08:02:40 -08:00
SOPInstructions.td AMDGPU/GlobalISel: Select G_CTTZ_ZERO_UNDEF 2020-02-12 16:19:46 -08:00
VIInstrFormats.td
VIInstructions.td
VOP1Instructions.td AMDGPU/GlobalISel: Select G_CTTZ_ZERO_UNDEF 2020-02-12 16:19:46 -08:00
VOP2Instructions.td [AMDGPU] fixed divergence driven shift operations selection 2020-01-31 20:49:56 +03:00
VOP3Instructions.td AMDGPU: Remove VOP3OpSelMods0 complex pattern 2020-03-04 17:18:22 -05:00
VOP3PInstructions.td AMDGPU: Move dot intrinsic patterns to instruction def 2020-02-21 13:35:40 -05:00
VOPCInstructions.td AMDGPU: Remove VOP3Mods0Clamp0OMod 2020-01-07 15:10:08 -05:00
VOPInstructions.td