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bd828c852a
Summary: Extends the multivalue call infrastructure to tail calls, removes all legacy calls specialized for particular result types, and removes the CallIndirectFixup pass, since all indirect call arguments are now fixed up directly in the post-insertion hook. In order to keep supporting pretty-printed defs and uses in test expectations, MCInstLower now inserts an immediate containing the number of defs for each call and call_indirect. The InstPrinter is updated to query this immediate if it is present and determine which MCOperands are defs and uses accordingly. Depends on D72902. Reviewers: aheejin Subscribers: dschuff, mgorny, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D74192
268 lines
9.6 KiB
C++
268 lines
9.6 KiB
C++
//- WebAssemblyISelDAGToDAG.cpp - A dag to dag inst selector for WebAssembly -//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// This file defines an instruction selector for the WebAssembly target.
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///
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
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#include "WebAssembly.h"
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#include "WebAssemblyTargetMachine.h"
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#include "llvm/CodeGen/SelectionDAGISel.h"
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#include "llvm/IR/DiagnosticInfo.h"
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#include "llvm/IR/Function.h" // To access function attributes.
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#include "llvm/IR/IntrinsicsWebAssembly.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/KnownBits.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/raw_ostream.h"
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using namespace llvm;
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#define DEBUG_TYPE "wasm-isel"
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//===--------------------------------------------------------------------===//
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/// WebAssembly-specific code to select WebAssembly machine instructions for
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/// SelectionDAG operations.
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///
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namespace {
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class WebAssemblyDAGToDAGISel final : public SelectionDAGISel {
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/// Keep a pointer to the WebAssemblySubtarget around so that we can make the
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/// right decision when generating code for different targets.
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const WebAssemblySubtarget *Subtarget;
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public:
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WebAssemblyDAGToDAGISel(WebAssemblyTargetMachine &TM,
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CodeGenOpt::Level OptLevel)
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: SelectionDAGISel(TM, OptLevel), Subtarget(nullptr) {
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}
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StringRef getPassName() const override {
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return "WebAssembly Instruction Selection";
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}
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bool runOnMachineFunction(MachineFunction &MF) override {
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LLVM_DEBUG(dbgs() << "********** ISelDAGToDAG **********\n"
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"********** Function: "
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<< MF.getName() << '\n');
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Subtarget = &MF.getSubtarget<WebAssemblySubtarget>();
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// Wasm64 is not fully supported right now (and is not specified)
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if (Subtarget->hasAddr64())
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report_fatal_error(
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"64-bit WebAssembly (wasm64) is not currently supported");
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return SelectionDAGISel::runOnMachineFunction(MF);
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}
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void Select(SDNode *Node) override;
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bool SelectInlineAsmMemoryOperand(const SDValue &Op, unsigned ConstraintID,
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std::vector<SDValue> &OutOps) override;
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// Include the pieces autogenerated from the target description.
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#include "WebAssemblyGenDAGISel.inc"
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private:
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// add select functions here...
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};
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} // end anonymous namespace
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void WebAssemblyDAGToDAGISel::Select(SDNode *Node) {
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// If we have a custom node, we already have selected!
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if (Node->isMachineOpcode()) {
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LLVM_DEBUG(errs() << "== "; Node->dump(CurDAG); errs() << "\n");
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Node->setNodeId(-1);
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return;
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}
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// Few custom selection stuff.
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SDLoc DL(Node);
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MachineFunction &MF = CurDAG->getMachineFunction();
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switch (Node->getOpcode()) {
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case ISD::ATOMIC_FENCE: {
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if (!MF.getSubtarget<WebAssemblySubtarget>().hasAtomics())
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break;
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uint64_t SyncScopeID =
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cast<ConstantSDNode>(Node->getOperand(2).getNode())->getZExtValue();
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MachineSDNode *Fence = nullptr;
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switch (SyncScopeID) {
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case SyncScope::SingleThread:
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// We lower a single-thread fence to a pseudo compiler barrier instruction
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// preventing instruction reordering. This will not be emitted in final
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// binary.
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Fence = CurDAG->getMachineNode(WebAssembly::COMPILER_FENCE,
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DL, // debug loc
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MVT::Other, // outchain type
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Node->getOperand(0) // inchain
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);
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break;
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case SyncScope::System:
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// Currently wasm only supports sequentially consistent atomics, so we
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// always set the order to 0 (sequentially consistent).
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Fence = CurDAG->getMachineNode(
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WebAssembly::ATOMIC_FENCE,
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DL, // debug loc
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MVT::Other, // outchain type
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CurDAG->getTargetConstant(0, DL, MVT::i32), // order
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Node->getOperand(0) // inchain
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);
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break;
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default:
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llvm_unreachable("Unknown scope!");
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}
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ReplaceNode(Node, Fence);
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CurDAG->RemoveDeadNode(Node);
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return;
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}
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case ISD::GlobalTLSAddress: {
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const auto *GA = cast<GlobalAddressSDNode>(Node);
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if (!MF.getSubtarget<WebAssemblySubtarget>().hasBulkMemory())
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report_fatal_error("cannot use thread-local storage without bulk memory",
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false);
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// Currently Emscripten does not support dynamic linking with threads.
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// Therefore, if we have thread-local storage, only the local-exec model
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// is possible.
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// TODO: remove this and implement proper TLS models once Emscripten
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// supports dynamic linking with threads.
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if (GA->getGlobal()->getThreadLocalMode() !=
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GlobalValue::LocalExecTLSModel &&
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!Subtarget->getTargetTriple().isOSEmscripten()) {
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report_fatal_error("only -ftls-model=local-exec is supported for now on "
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"non-Emscripten OSes: variable " +
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GA->getGlobal()->getName(),
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false);
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}
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MVT PtrVT = TLI->getPointerTy(CurDAG->getDataLayout());
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assert(PtrVT == MVT::i32 && "only wasm32 is supported for now");
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SDValue TLSBaseSym = CurDAG->getTargetExternalSymbol("__tls_base", PtrVT);
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SDValue TLSOffsetSym = CurDAG->getTargetGlobalAddress(
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GA->getGlobal(), DL, PtrVT, GA->getOffset(), 0);
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MachineSDNode *TLSBase = CurDAG->getMachineNode(WebAssembly::GLOBAL_GET_I32,
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DL, MVT::i32, TLSBaseSym);
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MachineSDNode *TLSOffset = CurDAG->getMachineNode(
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WebAssembly::CONST_I32, DL, MVT::i32, TLSOffsetSym);
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MachineSDNode *TLSAddress =
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CurDAG->getMachineNode(WebAssembly::ADD_I32, DL, MVT::i32,
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SDValue(TLSBase, 0), SDValue(TLSOffset, 0));
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ReplaceNode(Node, TLSAddress);
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return;
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}
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case ISD::INTRINSIC_WO_CHAIN: {
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unsigned IntNo = cast<ConstantSDNode>(Node->getOperand(0))->getZExtValue();
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switch (IntNo) {
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case Intrinsic::wasm_tls_size: {
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MVT PtrVT = TLI->getPointerTy(CurDAG->getDataLayout());
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assert(PtrVT == MVT::i32 && "only wasm32 is supported for now");
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MachineSDNode *TLSSize = CurDAG->getMachineNode(
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WebAssembly::GLOBAL_GET_I32, DL, PtrVT,
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CurDAG->getTargetExternalSymbol("__tls_size", MVT::i32));
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ReplaceNode(Node, TLSSize);
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return;
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}
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case Intrinsic::wasm_tls_align: {
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MVT PtrVT = TLI->getPointerTy(CurDAG->getDataLayout());
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assert(PtrVT == MVT::i32 && "only wasm32 is supported for now");
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MachineSDNode *TLSAlign = CurDAG->getMachineNode(
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WebAssembly::GLOBAL_GET_I32, DL, PtrVT,
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CurDAG->getTargetExternalSymbol("__tls_align", MVT::i32));
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ReplaceNode(Node, TLSAlign);
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return;
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}
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}
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break;
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}
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case ISD::INTRINSIC_W_CHAIN: {
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unsigned IntNo = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue();
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switch (IntNo) {
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case Intrinsic::wasm_tls_base: {
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MVT PtrVT = TLI->getPointerTy(CurDAG->getDataLayout());
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assert(PtrVT == MVT::i32 && "only wasm32 is supported for now");
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MachineSDNode *TLSBase = CurDAG->getMachineNode(
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WebAssembly::GLOBAL_GET_I32, DL, MVT::i32, MVT::Other,
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CurDAG->getTargetExternalSymbol("__tls_base", PtrVT),
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Node->getOperand(0));
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ReplaceNode(Node, TLSBase);
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return;
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}
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}
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break;
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}
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case WebAssemblyISD::CALL:
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case WebAssemblyISD::RET_CALL: {
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// CALL has both variable operands and variable results, but ISel only
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// supports one or the other. Split calls into two nodes glued together, one
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// for the operands and one for the results. These two nodes will be
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// recombined in a custom inserter hook into a single MachineInstr.
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SmallVector<SDValue, 16> Ops;
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for (size_t i = 1; i < Node->getNumOperands(); ++i) {
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SDValue Op = Node->getOperand(i);
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if (i == 1 && Op->getOpcode() == WebAssemblyISD::Wrapper)
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Op = Op->getOperand(0);
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Ops.push_back(Op);
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}
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// Add the chain last
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Ops.push_back(Node->getOperand(0));
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MachineSDNode *CallParams =
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CurDAG->getMachineNode(WebAssembly::CALL_PARAMS, DL, MVT::Glue, Ops);
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unsigned Results = Node->getOpcode() == WebAssemblyISD::CALL
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? WebAssembly::CALL_RESULTS
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: WebAssembly::RET_CALL_RESULTS;
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SDValue Link(CallParams, 0);
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MachineSDNode *CallResults =
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CurDAG->getMachineNode(Results, DL, Node->getVTList(), Link);
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ReplaceNode(Node, CallResults);
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return;
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}
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default:
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break;
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}
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// Select the default instruction.
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SelectCode(Node);
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}
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bool WebAssemblyDAGToDAGISel::SelectInlineAsmMemoryOperand(
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const SDValue &Op, unsigned ConstraintID, std::vector<SDValue> &OutOps) {
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switch (ConstraintID) {
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case InlineAsm::Constraint_m:
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// We just support simple memory operands that just have a single address
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// operand and need no special handling.
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OutOps.push_back(Op);
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return false;
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default:
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break;
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}
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return true;
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}
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/// This pass converts a legalized DAG into a WebAssembly-specific DAG, ready
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/// for instruction scheduling.
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FunctionPass *llvm::createWebAssemblyISelDag(WebAssemblyTargetMachine &TM,
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CodeGenOpt::Level OptLevel) {
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return new WebAssemblyDAGToDAGISel(TM, OptLevel);
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}
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