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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-31 07:52:55 +01:00
llvm-mirror/test/CodeGen
Jakob Stoklund Olesen 3bee83c3a5 Transfer memory operands to the right instruction.
They need to go on the PICLDR as the verifier points out.

llvm-svn: 157151
2012-05-20 06:38:42 +00:00
..
ARM Transfer memory operands to the right instruction. 2012-05-20 06:38:42 +00:00
CellSPU
CPP
Generic change the objectsize intrinsic signature: add a 3rd parameter to denote the maximum runtime performance penalty that the user is willing to accept. 2012-05-09 15:52:43 +00:00
Hexagon Enable all Hexagon tests. 2012-05-15 16:13:12 +00:00
MBlaze
Mips Add support for the 'd' mips inline asm output modifier. 2012-05-19 00:51:56 +00:00
MSP430
NVPTX This patch adds a new NVPTX back-end to LLVM which supports code generation for NVIDIA PTX 3.0. This back-end will (eventually) replace the current PTX back-end, while maintaining compatibility with it. 2012-05-04 20:18:50 +00:00
PowerPC Remove -join-physregs from the test suite. 2012-05-17 23:44:19 +00:00
PTX
SPARC Regression test for PR2960. 2012-05-01 11:11:34 +00:00
Thumb Make test less fragile. 2012-04-27 20:48:18 +00:00
Thumb2 Refactor data-in-code annotations. 2012-05-18 19:12:01 +00:00
X86 Properly constrain register classes for sub-registers. 2012-05-20 06:38:37 +00:00
XCore