mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-25 04:02:41 +01:00
32e5ce3d96
Change insert/extract subreg instructions to be able to be used in TableGen patterns. Use the above features to reimplement an x86-64 pseudo instruction as a pattern. llvm-svn: 48130 |
||
---|---|---|
.. | ||
llvm | ||
llvm-c |