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04a5b0845c
D4796 taught LLVM to fold some atomic integer operations into a single instruction. The pattern was unaware that the instructions clobbered flags. I fixed some of this issue in D13680 but had missed INC/DEC. This patch adds the missing EFLAGS definition. llvm-svn: 250438
62 lines
1.6 KiB
LLVM
62 lines
1.6 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -verify-machineinstrs | FileCheck %s
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; RUN: llc < %s -mtriple=i686-unknown-unknown -verify-machineinstrs | FileCheck %s
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; Make sure that flags are properly preserved despite atomic optimizations.
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define i32 @atomic_and_flags_1(i8* %p, i32 %a, i32 %b) {
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; CHECK-LABEL: atomic_and_flags_1:
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; Generate flags value, and use it.
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; CHECK: cmpl
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; CHECK-NEXT: jne
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%cmp = icmp eq i32 %a, %b
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br i1 %cmp, label %L1, label %L2
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L1:
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; The following pattern will get folded.
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; CHECK: incb
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%1 = load atomic i8, i8* %p seq_cst, align 1
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%2 = add i8 %1, 1 ; This forces the INC instruction to be generated.
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store atomic i8 %2, i8* %p release, align 1
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; Use the comparison result again. We need to rematerialize the comparison
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; somehow. This test checks that cmpl gets emitted again, but any
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; rematerialization would work (the optimizer used to clobber the flags with
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; the add).
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; CHECK-NEXT: cmpl
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; CHECK-NEXT: jne
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br i1 %cmp, label %L3, label %L4
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L2:
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ret i32 2
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L3:
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ret i32 3
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L4:
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ret i32 4
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}
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; Same as above, but using 2 as immediate to avoid the INC instruction.
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define i32 @atomic_and_flags_2(i8* %p, i32 %a, i32 %b) {
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; CHECK-LABEL: atomic_and_flags_2:
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; CHECK: cmpl
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; CHECK-NEXT: jne
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%cmp = icmp eq i32 %a, %b
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br i1 %cmp, label %L1, label %L2
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L1:
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; CHECK: addb
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%1 = load atomic i8, i8* %p seq_cst, align 1
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%2 = add i8 %1, 2
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store atomic i8 %2, i8* %p release, align 1
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; CHECK-NEXT: cmpl
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; CHECK-NEXT: jne
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br i1 %cmp, label %L3, label %L4
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L2:
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ret i32 2
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L3:
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ret i32 3
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L4:
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ret i32 4
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}
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