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30264d4391
As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
93 lines
2.8 KiB
LLVM
93 lines
2.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-pc-linux-gnu -mcpu=corei7 | FileCheck %s
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; RUN: llc < %s -mtriple=i686-pc-linux-gnu -mcpu=core-avx-i | FileCheck %s --check-prefix=AVX
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define <1 x float> @test1(<1 x double>* %p) nounwind {
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; CHECK-LABEL: test1:
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; CHECK: # %bb.0:
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; CHECK-NEXT: pushl %eax
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; CHECK-NEXT: cvtsd2ss %xmm0, %xmm0
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; CHECK-NEXT: movss %xmm0, (%esp)
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; CHECK-NEXT: flds (%esp)
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; CHECK-NEXT: popl %eax
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; CHECK-NEXT: retl
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;
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; AVX-LABEL: test1:
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; AVX: # %bb.0:
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; AVX-NEXT: pushl %eax
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; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
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; AVX-NEXT: vmovsd {{.*#+}} xmm0 = mem[0],zero
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; AVX-NEXT: vcvtsd2ss %xmm0, %xmm0, %xmm0
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; AVX-NEXT: vmovss %xmm0, (%esp)
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; AVX-NEXT: flds (%esp)
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; AVX-NEXT: popl %eax
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; AVX-NEXT: retl
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%x = load <1 x double>, <1 x double>* %p
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%y = fptrunc <1 x double> %x to <1 x float>
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ret <1 x float> %y
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}
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define <2 x float> @test2(<2 x double>* %p) nounwind {
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; CHECK-LABEL: test2:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: cvtpd2ps (%eax), %xmm0
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; CHECK-NEXT: retl
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;
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; AVX-LABEL: test2:
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; AVX: # %bb.0:
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; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
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; AVX-NEXT: vcvtpd2psx (%eax), %xmm0
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; AVX-NEXT: retl
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%x = load <2 x double>, <2 x double>* %p
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%y = fptrunc <2 x double> %x to <2 x float>
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ret <2 x float> %y
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}
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define <4 x float> @test3(<4 x double>* %p) nounwind {
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; CHECK-LABEL: test3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: cvtpd2ps 16(%eax), %xmm1
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; CHECK-NEXT: cvtpd2ps (%eax), %xmm0
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; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; CHECK-NEXT: retl
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;
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; AVX-LABEL: test3:
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; AVX: # %bb.0:
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; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
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; AVX-NEXT: vcvtpd2psy (%eax), %xmm0
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; AVX-NEXT: retl
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%x = load <4 x double>, <4 x double>* %p
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%y = fptrunc <4 x double> %x to <4 x float>
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ret <4 x float> %y
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}
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define <8 x float> @test4(<8 x double>* %p) nounwind {
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; CHECK-LABEL: test4:
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; CHECK: # %bb.0:
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: cvtpd2ps 16(%eax), %xmm1
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; CHECK-NEXT: cvtpd2ps (%eax), %xmm0
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; CHECK-NEXT: unpcklpd {{.*#+}} xmm0 = xmm0[0],xmm1[0]
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; CHECK-NEXT: cvtpd2ps 48(%eax), %xmm2
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; CHECK-NEXT: cvtpd2ps 32(%eax), %xmm1
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; CHECK-NEXT: unpcklpd {{.*#+}} xmm1 = xmm1[0],xmm2[0]
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; CHECK-NEXT: retl
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;
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; AVX-LABEL: test4:
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; AVX: # %bb.0:
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; AVX-NEXT: movl {{[0-9]+}}(%esp), %eax
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; AVX-NEXT: vcvtpd2psy (%eax), %xmm0
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; AVX-NEXT: vcvtpd2psy 32(%eax), %xmm1
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; AVX-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; AVX-NEXT: retl
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%x = load <8 x double>, <8 x double>* %p
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%y = fptrunc <8 x double> %x to <8 x float>
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ret <8 x float> %y
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}
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