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1c2f80aef6
This adds a new instrinsic to support the rdpid instruction. The implementation is a bit weird because the intrinsic is defined as always returning 32-bits, but the assembler support thinks the instruction produces a 64-bit register in 64-bit mode. But really it zeros the upper 32 bits. So I had to add separate patterns where 64-bit mode uses an extract_subreg. Differential Revision: https://reviews.llvm.org/D42205 llvm-svn: 322910
22 lines
680 B
LLVM
22 lines
680 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-- -mattr=rdpid | FileCheck %s --check-prefix=CHECK --check-prefix=X86-64
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; RUN: llc < %s -mtriple=i686-- -mattr=rdpid | FileCheck %s --check-prefix=CHECK --check-prefix=X86
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define i32 @test_builtin_rdpid() {
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; X86-64-LABEL: test_builtin_rdpid:
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; X86-64: # %bb.0:
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; X86-64-NEXT: rdpid %rax
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; X86-64-NEXT: # kill: def %eax killed %eax killed %rax
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; X86-64-NEXT: retq
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;
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; X86-LABEL: test_builtin_rdpid:
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; X86: # %bb.0:
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; X86-NEXT: rdpid %eax
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; X86-NEXT: retl
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%1 = tail call i32 @llvm.x86.rdpid()
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ret i32 %1
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}
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declare i32 @llvm.x86.rdpid()
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