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55d27cdd65
Updated the scheduling information for the Haswell subtarget with the following changes: Regrouped the instructions after adding appropriate load + store latencies. Added scheduling for missing instructions such as the GATHER instrs. The changes were made after revisiting the latencies impact of all memory uOps. Reviewers: RKSimon, zvi, craig.topper, apilipenko Differential Revision: https://reviews.llvm.org/D40021 Change-Id: Iaf6c1f5169add1552845a8a566af4e5a359217a7 llvm-svn: 320137
149 lines
5.3 KiB
LLVM
149 lines
5.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=x86-64 -mattr=+rdrnd | FileCheck %s --check-prefix=CHECK --check-prefix=GENERIC
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=goldmont | FileCheck %s --check-prefix=CHECK --check-prefix=GOLDMONT
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=ivybridge | FileCheck %s --check-prefix=CHECK --check-prefix=IVY
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=haswell | FileCheck %s --check-prefix=CHECK --check-prefix=HASWELL
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=broadwell | FileCheck %s --check-prefix=CHECK --check-prefix=BROADWELL
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skylake | FileCheck %s --check-prefix=CHECK --check-prefix=SKYLAKE
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=skx | FileCheck %s --check-prefix=CHECK --check-prefix=SKX
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -print-schedule -mcpu=znver1 | FileCheck %s --check-prefix=CHECK --check-prefix=ZNVER1
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declare {i16, i32} @llvm.x86.rdrand.16()
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declare {i32, i32} @llvm.x86.rdrand.32()
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declare {i64, i32} @llvm.x86.rdrand.64()
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define i16 @test_rdrand_16(i16* %random_val) {
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; GENERIC-LABEL: test_rdrand_16:
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; GENERIC: # %bb.0:
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; GENERIC-NEXT: rdrandw %ax # sched: [100:0.33]
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; GENERIC-NEXT: retq # sched: [1:1.00]
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;
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; GOLDMONT-LABEL: test_rdrand_16:
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; GOLDMONT: # %bb.0:
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; GOLDMONT-NEXT: rdrandw %ax # sched: [100:1.00]
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; GOLDMONT-NEXT: retq # sched: [4:1.00]
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;
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; IVY-LABEL: test_rdrand_16:
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; IVY: # %bb.0:
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; IVY-NEXT: rdrandw %ax # sched: [100:0.33]
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; IVY-NEXT: retq # sched: [1:1.00]
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;
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; HASWELL-LABEL: test_rdrand_16:
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; HASWELL: # %bb.0:
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; HASWELL-NEXT: rdrandw %ax # sched: [1:5.33]
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; HASWELL-NEXT: retq # sched: [7:1.00]
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;
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; BROADWELL-LABEL: test_rdrand_16:
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; BROADWELL: # %bb.0:
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; BROADWELL-NEXT: rdrandw %ax # sched: [9:1.00]
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; BROADWELL-NEXT: retq # sched: [7:1.00]
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;
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; SKYLAKE-LABEL: test_rdrand_16:
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; SKYLAKE: # %bb.0:
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; SKYLAKE-NEXT: rdrandw %ax # sched: [100:0.25]
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; SKYLAKE-NEXT: retq # sched: [7:1.00]
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;
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; SKX-LABEL: test_rdrand_16:
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; SKX: # %bb.0:
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; SKX-NEXT: rdrandw %ax # sched: [100:0.25]
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; SKX-NEXT: retq # sched: [7:1.00]
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;
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; ZNVER1-LABEL: test_rdrand_16:
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; ZNVER1: # %bb.0:
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; ZNVER1-NEXT: rdrandw %ax # sched: [100:?]
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; ZNVER1-NEXT: retq # sched: [1:0.50]
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%call = call {i16, i32} @llvm.x86.rdrand.16()
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%randval = extractvalue {i16, i32} %call, 0
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ret i16 %randval
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}
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define i32 @test_rdrand_32(i32* %random_val) {
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; GENERIC-LABEL: test_rdrand_32:
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; GENERIC: # %bb.0:
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; GENERIC-NEXT: rdrandl %eax # sched: [100:0.33]
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; GENERIC-NEXT: retq # sched: [1:1.00]
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;
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; GOLDMONT-LABEL: test_rdrand_32:
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; GOLDMONT: # %bb.0:
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; GOLDMONT-NEXT: rdrandl %eax # sched: [100:1.00]
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; GOLDMONT-NEXT: retq # sched: [4:1.00]
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;
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; IVY-LABEL: test_rdrand_32:
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; IVY: # %bb.0:
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; IVY-NEXT: rdrandl %eax # sched: [100:0.33]
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; IVY-NEXT: retq # sched: [1:1.00]
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;
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; HASWELL-LABEL: test_rdrand_32:
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; HASWELL: # %bb.0:
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; HASWELL-NEXT: rdrandl %eax # sched: [1:5.33]
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; HASWELL-NEXT: retq # sched: [7:1.00]
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;
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; BROADWELL-LABEL: test_rdrand_32:
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; BROADWELL: # %bb.0:
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; BROADWELL-NEXT: rdrandl %eax # sched: [9:1.00]
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; BROADWELL-NEXT: retq # sched: [7:1.00]
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;
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; SKYLAKE-LABEL: test_rdrand_32:
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; SKYLAKE: # %bb.0:
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; SKYLAKE-NEXT: rdrandl %eax # sched: [100:0.25]
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; SKYLAKE-NEXT: retq # sched: [7:1.00]
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;
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; SKX-LABEL: test_rdrand_32:
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; SKX: # %bb.0:
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; SKX-NEXT: rdrandl %eax # sched: [100:0.25]
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; SKX-NEXT: retq # sched: [7:1.00]
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;
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; ZNVER1-LABEL: test_rdrand_32:
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; ZNVER1: # %bb.0:
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; ZNVER1-NEXT: rdrandl %eax # sched: [100:?]
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; ZNVER1-NEXT: retq # sched: [1:0.50]
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%call = call {i32, i32} @llvm.x86.rdrand.32()
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%randval = extractvalue {i32, i32} %call, 0
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ret i32 %randval
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}
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define i64 @test_rdrand_64(i64* %random_val) {
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; GENERIC-LABEL: test_rdrand_64:
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; GENERIC: # %bb.0:
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; GENERIC-NEXT: rdrandq %rax # sched: [100:0.33]
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; GENERIC-NEXT: retq # sched: [1:1.00]
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;
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; GOLDMONT-LABEL: test_rdrand_64:
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; GOLDMONT: # %bb.0:
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; GOLDMONT-NEXT: rdrandq %rax # sched: [100:1.00]
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; GOLDMONT-NEXT: retq # sched: [4:1.00]
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;
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; IVY-LABEL: test_rdrand_64:
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; IVY: # %bb.0:
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; IVY-NEXT: rdrandq %rax # sched: [100:0.33]
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; IVY-NEXT: retq # sched: [1:1.00]
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;
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; HASWELL-LABEL: test_rdrand_64:
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; HASWELL: # %bb.0:
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; HASWELL-NEXT: rdrandq %rax # sched: [1:5.33]
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; HASWELL-NEXT: retq # sched: [7:1.00]
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;
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; BROADWELL-LABEL: test_rdrand_64:
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; BROADWELL: # %bb.0:
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; BROADWELL-NEXT: rdrandq %rax # sched: [9:1.00]
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; BROADWELL-NEXT: retq # sched: [7:1.00]
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;
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; SKYLAKE-LABEL: test_rdrand_64:
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; SKYLAKE: # %bb.0:
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; SKYLAKE-NEXT: rdrandq %rax # sched: [100:0.25]
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; SKYLAKE-NEXT: retq # sched: [7:1.00]
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;
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; SKX-LABEL: test_rdrand_64:
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; SKX: # %bb.0:
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; SKX-NEXT: rdrandq %rax # sched: [100:0.25]
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; SKX-NEXT: retq # sched: [7:1.00]
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;
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; ZNVER1-LABEL: test_rdrand_64:
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; ZNVER1: # %bb.0:
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; ZNVER1-NEXT: rdrandq %rax # sched: [100:?]
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; ZNVER1-NEXT: retq # sched: [1:0.50]
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%call = call {i64, i32} @llvm.x86.rdrand.64()
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%randval = extractvalue {i64, i32} %call, 0
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ret i64 %randval
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}
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