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30264d4391
As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
201 lines
5.0 KiB
LLVM
201 lines
5.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-- -mcpu=corei7 | FileCheck %s --check-prefix=ALL --check-prefix=X86
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; RUN: llc < %s -mtriple=i686-- -mcpu=corei7-avx | FileCheck %s --check-prefix=ALL --check-prefix=SHLD
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; RUN: llc < %s -mtriple=i686-- -mcpu=core-avx2 | FileCheck %s --check-prefix=ALL --check-prefix=BMI2
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define i32 @foo(i32 %x, i32 %y, i32 %z) nounwind readnone {
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; ALL-LABEL: foo:
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; ALL: # %bb.0: # %entry
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; ALL-NEXT: movb {{[0-9]+}}(%esp), %cl
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; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
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; ALL-NEXT: roll %cl, %eax
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; ALL-NEXT: retl
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entry:
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%0 = shl i32 %x, %z
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%1 = sub i32 32, %z
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%2 = lshr i32 %x, %1
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%3 = or i32 %2, %0
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ret i32 %3
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}
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define i32 @bar(i32 %x, i32 %y, i32 %z) nounwind readnone {
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; ALL-LABEL: bar:
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; ALL: # %bb.0: # %entry
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; ALL-NEXT: movb {{[0-9]+}}(%esp), %cl
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; ALL-NEXT: movl {{[0-9]+}}(%esp), %edx
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; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
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; ALL-NEXT: shldl %cl, %edx, %eax
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; ALL-NEXT: retl
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entry:
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%0 = shl i32 %y, %z
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%1 = sub i32 32, %z
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%2 = lshr i32 %x, %1
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%3 = or i32 %2, %0
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ret i32 %3
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}
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define i32 @un(i32 %x, i32 %y, i32 %z) nounwind readnone {
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; ALL-LABEL: un:
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; ALL: # %bb.0: # %entry
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; ALL-NEXT: movb {{[0-9]+}}(%esp), %cl
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; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
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; ALL-NEXT: rorl %cl, %eax
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; ALL-NEXT: retl
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entry:
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%0 = lshr i32 %x, %z
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%1 = sub i32 32, %z
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%2 = shl i32 %x, %1
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%3 = or i32 %2, %0
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ret i32 %3
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}
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define i32 @bu(i32 %x, i32 %y, i32 %z) nounwind readnone {
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; ALL-LABEL: bu:
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; ALL: # %bb.0: # %entry
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; ALL-NEXT: movb {{[0-9]+}}(%esp), %cl
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; ALL-NEXT: movl {{[0-9]+}}(%esp), %edx
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; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
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; ALL-NEXT: shrdl %cl, %edx, %eax
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; ALL-NEXT: retl
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entry:
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%0 = lshr i32 %y, %z
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%1 = sub i32 32, %z
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%2 = shl i32 %x, %1
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%3 = or i32 %2, %0
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ret i32 %3
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}
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define i32 @xfoo(i32 %x, i32 %y, i32 %z) nounwind readnone {
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; X86-LABEL: xfoo:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: roll $7, %eax
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; X86-NEXT: retl
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;
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; SHLD-LABEL: xfoo:
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; SHLD: # %bb.0: # %entry
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; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SHLD-NEXT: shldl $7, %eax, %eax
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; SHLD-NEXT: retl
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;
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; BMI2-LABEL: xfoo:
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; BMI2: # %bb.0: # %entry
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; BMI2-NEXT: rorxl $25, {{[0-9]+}}(%esp), %eax
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; BMI2-NEXT: retl
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entry:
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%0 = lshr i32 %x, 25
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%1 = shl i32 %x, 7
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%2 = or i32 %0, %1
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ret i32 %2
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}
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define i32 @xfoop(i32* %p) nounwind readnone {
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; X86-LABEL: xfoop:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl (%eax), %eax
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; X86-NEXT: roll $7, %eax
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; X86-NEXT: retl
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;
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; SHLD-LABEL: xfoop:
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; SHLD: # %bb.0: # %entry
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; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SHLD-NEXT: movl (%eax), %eax
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; SHLD-NEXT: shldl $7, %eax, %eax
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; SHLD-NEXT: retl
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;
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; BMI2-LABEL: xfoop:
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; BMI2: # %bb.0: # %entry
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; BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
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; BMI2-NEXT: rorxl $25, (%eax), %eax
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; BMI2-NEXT: retl
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entry:
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%x = load i32, i32* %p
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%a = lshr i32 %x, 25
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%b = shl i32 %x, 7
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%c = or i32 %a, %b
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ret i32 %c
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}
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define i32 @xbar(i32 %x, i32 %y, i32 %z) nounwind readnone {
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; ALL-LABEL: xbar:
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; ALL: # %bb.0: # %entry
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; ALL-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
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; ALL-NEXT: shldl $7, %ecx, %eax
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; ALL-NEXT: retl
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entry:
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%0 = shl i32 %y, 7
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%1 = lshr i32 %x, 25
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%2 = or i32 %0, %1
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ret i32 %2
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}
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define i32 @xun(i32 %x, i32 %y, i32 %z) nounwind readnone {
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; X86-LABEL: xun:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: roll $25, %eax
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; X86-NEXT: retl
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;
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; SHLD-LABEL: xun:
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; SHLD: # %bb.0: # %entry
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; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SHLD-NEXT: shldl $25, %eax, %eax
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; SHLD-NEXT: retl
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;
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; BMI2-LABEL: xun:
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; BMI2: # %bb.0: # %entry
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; BMI2-NEXT: rorxl $7, {{[0-9]+}}(%esp), %eax
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; BMI2-NEXT: retl
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entry:
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%0 = lshr i32 %x, 7
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%1 = shl i32 %x, 25
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%2 = or i32 %0, %1
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ret i32 %2
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}
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define i32 @xunp(i32* %p) nounwind readnone {
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; X86-LABEL: xunp:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl (%eax), %eax
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; X86-NEXT: roll $25, %eax
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; X86-NEXT: retl
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;
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; SHLD-LABEL: xunp:
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; SHLD: # %bb.0: # %entry
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; SHLD-NEXT: movl {{[0-9]+}}(%esp), %eax
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; SHLD-NEXT: movl (%eax), %eax
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; SHLD-NEXT: shldl $25, %eax, %eax
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; SHLD-NEXT: retl
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;
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; BMI2-LABEL: xunp:
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; BMI2: # %bb.0: # %entry
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; BMI2-NEXT: movl {{[0-9]+}}(%esp), %eax
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; BMI2-NEXT: rorxl $7, (%eax), %eax
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; BMI2-NEXT: retl
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entry:
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; shld-label: xunp:
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; shld: shldl $25
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%x = load i32, i32* %p
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%a = lshr i32 %x, 7
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%b = shl i32 %x, 25
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%c = or i32 %a, %b
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ret i32 %c
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}
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define i32 @xbu(i32 %x, i32 %y, i32 %z) nounwind readnone {
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; ALL-LABEL: xbu:
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; ALL: # %bb.0: # %entry
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; ALL-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; ALL-NEXT: movl {{[0-9]+}}(%esp), %eax
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; ALL-NEXT: shldl $25, %ecx, %eax
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; ALL-NEXT: retl
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entry:
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%0 = lshr i32 %y, 7
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%1 = shl i32 %x, 25
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%2 = or i32 %0, %1
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ret i32 %2
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}
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