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10839866a1
This patch implements initial backend support for a -mtune CPU controlled by a "tune-cpu" function attribute. If the attribute is not present X86 will use the resolved CPU from target-cpu attribute or command line. This patch adds MC layer support a tune CPU. Each CPU now has two sets of features stored in their GenSubtargetInfo.inc tables . These features lists are passed separately to the Processor and ProcessorModel classes in tablegen. The tune list defaults to an empty list to avoid changes to non-X86. This annoyingly increases the size of static tables on all target as we now store 24 more bytes per CPU. I haven't quantified the overall impact, but I can if we're concerned. One new test is added to X86 to show a few tuning features with mismatched tune-cpu and target-cpu/target-feature attributes to demonstrate independent control. Another new test is added to demonstrate that the scheduler model follows the tune CPU. I have not added a -mtune to llc/opt or MC layer command line yet. With no attributes we'll just use the -mcpu for both. MC layer tools will always follow the normal CPU for tuning. Differential Revision: https://reviews.llvm.org/D85165
102 lines
3.9 KiB
C++
102 lines
3.9 KiB
C++
//===-- SystemZSubtarget.cpp - SystemZ subtarget information --------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "SystemZSubtarget.h"
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#include "MCTargetDesc/SystemZMCTargetDesc.h"
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#include "llvm/IR/GlobalValue.h"
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#include "llvm/Target/TargetMachine.h"
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using namespace llvm;
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#define DEBUG_TYPE "systemz-subtarget"
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#define GET_SUBTARGETINFO_TARGET_DESC
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#define GET_SUBTARGETINFO_CTOR
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#include "SystemZGenSubtargetInfo.inc"
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static cl::opt<bool> UseSubRegLiveness(
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"systemz-subreg-liveness",
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cl::desc("Enable subregister liveness tracking for SystemZ (experimental)"),
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cl::Hidden);
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// Pin the vtable to this file.
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void SystemZSubtarget::anchor() {}
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SystemZSubtarget &
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SystemZSubtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS) {
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StringRef CPUName = CPU;
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if (CPUName.empty())
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CPUName = "generic";
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// Parse features string.
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ParseSubtargetFeatures(CPUName, /*TuneCPU*/ CPUName, FS);
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// -msoft-float implies -mno-vx.
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if (HasSoftFloat)
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HasVector = false;
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// -mno-vx implicitly disables all vector-related features.
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if (!HasVector) {
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HasVectorEnhancements1 = false;
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HasVectorEnhancements2 = false;
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HasVectorPackedDecimal = false;
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HasVectorPackedDecimalEnhancement = false;
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}
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return *this;
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}
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SystemZSubtarget::SystemZSubtarget(const Triple &TT, const std::string &CPU,
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const std::string &FS,
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const TargetMachine &TM)
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: SystemZGenSubtargetInfo(TT, CPU, /*TuneCPU*/ CPU, FS),
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HasDistinctOps(false), HasLoadStoreOnCond(false), HasHighWord(false),
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HasFPExtension(false), HasPopulationCount(false),
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HasMessageSecurityAssist3(false), HasMessageSecurityAssist4(false),
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HasResetReferenceBitsMultiple(false), HasFastSerialization(false),
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HasInterlockedAccess1(false), HasMiscellaneousExtensions(false),
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HasExecutionHint(false), HasLoadAndTrap(false),
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HasTransactionalExecution(false), HasProcessorAssist(false),
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HasDFPZonedConversion(false), HasEnhancedDAT2(false),
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HasVector(false), HasLoadStoreOnCond2(false),
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HasLoadAndZeroRightmostByte(false), HasMessageSecurityAssist5(false),
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HasDFPPackedConversion(false),
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HasMiscellaneousExtensions2(false), HasGuardedStorage(false),
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HasMessageSecurityAssist7(false), HasMessageSecurityAssist8(false),
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HasVectorEnhancements1(false), HasVectorPackedDecimal(false),
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HasInsertReferenceBitsMultiple(false),
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HasMiscellaneousExtensions3(false), HasMessageSecurityAssist9(false),
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HasVectorEnhancements2(false), HasVectorPackedDecimalEnhancement(false),
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HasEnhancedSort(false), HasDeflateConversion(false), HasSoftFloat(false),
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TargetTriple(TT), InstrInfo(initializeSubtargetDependencies(CPU, FS)),
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TLInfo(TM, *this), TSInfo(), FrameLowering() {}
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bool SystemZSubtarget::enableSubRegLiveness() const {
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return UseSubRegLiveness;
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}
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bool SystemZSubtarget::isPC32DBLSymbol(const GlobalValue *GV,
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CodeModel::Model CM) const {
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// PC32DBL accesses require the low bit to be clear.
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//
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// FIXME: Explicitly check for functions: the datalayout is currently
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// missing information about function pointers.
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const DataLayout &DL = GV->getParent()->getDataLayout();
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if (GV->getPointerAlignment(DL) == 1 && !GV->getValueType()->isFunctionTy())
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return false;
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// For the small model, all locally-binding symbols are in range.
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if (CM == CodeModel::Small)
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return TLInfo.getTargetMachine().shouldAssumeDSOLocal(*GV->getParent(), GV);
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// For Medium and above, assume that the symbol is not within the 4GB range.
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// Taking the address of locally-defined text would be OK, but that
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// case isn't easy to detect.
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return false;
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}
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