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0cbbc50f26
(and add false dependency) when it isn't dependent on last CPSR defining instruction. rdar://8928208 llvm-svn: 129773
17 lines
511 B
LLVM
17 lines
511 B
LLVM
; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mcpu=cortex-a9 | FileCheck %s
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; Avoid some 's' 16-bit instruction which partially update CPSR (and add false
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; dependency) when it isn't dependent on last CPSR defining instruction.
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; rdar://8928208
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define i32 @t(i32 %a, i32 %b, i32 %c, i32 %d) nounwind readnone {
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entry:
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; CHECK: t:
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; CHECK: muls r2, r3, r2
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; CHECK-NEXT: mul r0, r0, r1
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; CHECK-NEXT: muls r0, r2, r0
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%0 = mul nsw i32 %a, %b
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%1 = mul nsw i32 %c, %d
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%2 = mul nsw i32 %0, %1
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ret i32 %2
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}
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