mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-22 20:43:44 +02:00
3ce3b25440
This commit serializes the virtual register allocations hints of type 0. These hints specify the preferred physical registers for allocations. llvm-svn: 243156
36 lines
982 B
YAML
36 lines
982 B
YAML
# RUN: llc -march=x86-64 -start-after machine-scheduler -stop-after machine-scheduler -o /dev/null %s | FileCheck %s
|
|
# This test ensures that the MIR parser parses simple register allocation hints
|
|
# correctly.
|
|
|
|
--- |
|
|
|
|
define i32 @test(i32 %a, i32 %b) {
|
|
body:
|
|
%c = mul i32 %a, %b
|
|
ret i32 %c
|
|
}
|
|
|
|
...
|
|
---
|
|
name: test
|
|
tracksRegLiveness: true
|
|
# CHECK: registers:
|
|
# CHECK-NEXT: - { id: 0, class: gr32 }
|
|
# CHECK-NEXT: - { id: 1, class: gr32, preferred-register: '%esi' }
|
|
# CHECK-NEXT: - { id: 2, class: gr32, preferred-register: '%edi' }
|
|
registers:
|
|
- { id: 0, class: gr32 }
|
|
- { id: 1, class: gr32, preferred-register: '%esi' }
|
|
- { id: 2, class: gr32, preferred-register: '%edi' }
|
|
body:
|
|
- id: 0
|
|
name: body
|
|
liveins: [ '%edi', '%esi' ]
|
|
instructions:
|
|
- '%1 = COPY %esi'
|
|
- '%2 = COPY %edi'
|
|
- '%2 = IMUL32rr %2, %1, implicit-def dead %eflags'
|
|
- '%eax = COPY %2'
|
|
- 'RETQ killed %eax'
|
|
...
|