Daniel Sanders 3d06a1da65 [tablegen] Improve performance of -gen-register-info by replacing barely-necessary std::map with a sorted vector ... Summary: This particular map is hardly ever queried and has a phased usage pattern (insert, iterate, query, insert, iterate) so it's a good candidate for a sorted vector and std::lower_bound. This significantly reduces the run time of runTargetDesc() in some circumstances. One llvm-tblgen invocation in my build improves the time spent in runTargetDesc() from 9.86s down to 0.80s (~92%) without changing the output. The same invocation also has 2GB less allocation churn. Reviewers: bogner, rtereshin, aditya_nandakumar, volkan Reviewed By: rtereshin Subscribers: mgrang, dexonsmith, llvm-commits Differential Revision: https://reviews.llvm.org/D50272 llvm-svn: 339208		2018-08-08 00:19:59 +00:00
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llvm	[tablegen] Improve performance of -gen-register-info by replacing barely-necessary std::map with a sorted vector	2018-08-08 00:19:59 +00:00
llvm-c	[DebugInfo] Refactor DbgInfoIntrinsic class hierarchy.	2018-08-06 03:59:47 +00:00