Oliver Stannard 3d36623349 [ARM] Fix select_cc lowering for fp16 ... When lowering a select_cc node where the true and false values are of type f16, we can't use a general conditional move because the FP16 instructions do not support conditional execution. Instead, we must ensure that the condition code is one of the four supported by the VSEL instruction. Differential revision: https://reviews.llvm.org/D58813 llvm-svn: 355385		2019-03-05 10:42:34 +00:00
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Analysis	[SCEV] Handle case where MaxBECount is less precise than ExactBECount for OR.	2019-03-02 02:31:44 +00:00
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CodeGen	[ARM] Fix select_cc lowering for fp16	2019-03-05 10:42:34 +00:00
DebugInfo	[DebugInfo] Construct nested types on behalf of owner CU	2019-03-04 07:15:36 +00:00
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Instrumentation	Fix invalid target triples in tests. (NFC)	2019-03-04 23:37:41 +00:00
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MC	[ARM][MC] Update one test case in 'test/MC/Disassembler/ARM/invalid-armv7.txt'	2019-03-05 03:07:56 +00:00
Object	[llvm-readobj] Display section names for STT_SECTION symbols.	2019-03-01 17:31:32 +00:00
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TableGen	[Tablegen] Add support for the !mul operator.	2019-03-01 09:46:29 +00:00
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tools	[MCA] Highlight kernel bottlenecks in the summary view.	2019-03-04 11:52:34 +00:00
Transforms	Fix invalid target triples in tests. (NFC)	2019-03-04 23:37:41 +00:00
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