mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-24 03:33:20 +01:00
3d62f52b22
The inline asm operand constraint is initially encoded in the virtual register for the operand, but that register class may change during coalescing, and the original constraint is lost. Encode the original register class as part of the flag word for each inline asm operand. This makes it possible to recover the actual constraint required by inline asm, just like we can for normal instructions. llvm-svn: 141833 |
||
---|---|---|
.. | ||
Analysis | ||
Archive | ||
AsmParser | ||
Bitcode | ||
CodeGen | ||
DebugInfo | ||
ExecutionEngine | ||
Linker | ||
MC | ||
Object | ||
Support | ||
TableGen | ||
Target | ||
Transforms | ||
VMCore | ||
CMakeLists.txt | ||
Makefile |