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0738f328d7
Avoids using a plain unsigned for registers throughoug codegen. Doesn't attempt to change every register use, just something a little more than the set needed to build after changing the return type of MachineOperand::getReg(). llvm-svn: 364191
55 lines
1.7 KiB
C++
55 lines
1.7 KiB
C++
//===-- XCoreRegisterInfo.h - XCore Register Information Impl ---*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the XCore implementation of the MRegisterInfo class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_XCORE_XCOREREGISTERINFO_H
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#define LLVM_LIB_TARGET_XCORE_XCOREREGISTERINFO_H
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#include "llvm/CodeGen/TargetRegisterInfo.h"
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#define GET_REGINFO_HEADER
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#include "XCoreGenRegisterInfo.inc"
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namespace llvm {
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class TargetInstrInfo;
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struct XCoreRegisterInfo : public XCoreGenRegisterInfo {
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public:
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XCoreRegisterInfo();
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/// Code Generation virtual methods...
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const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
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BitVector getReservedRegs(const MachineFunction &MF) const override;
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bool requiresRegisterScavenging(const MachineFunction &MF) const override;
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bool trackLivenessAfterRegAlloc(const MachineFunction &MF) const override;
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bool useFPForScavengingIndex(const MachineFunction &MF) const override;
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void eliminateFrameIndex(MachineBasicBlock::iterator II,
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int SPAdj, unsigned FIOperandNum,
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RegScavenger *RS = nullptr) const override;
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// Debug information queries.
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Register getFrameRegister(const MachineFunction &MF) const override;
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//! Return whether to emit frame moves
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static bool needsFrameMoves(const MachineFunction &MF);
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};
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} // end namespace llvm
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#endif
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