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eb22b069bb
and allow some optimizations to turn conditional branches into unconditional. This commit adds a simple control-flow optimization which merges two consecutive basic blocks which are connected by a single edge. This allows the codegen to operate on larger basic blocks. rdar://11973998 llvm-svn: 161852
43 lines
1.1 KiB
LLVM
43 lines
1.1 KiB
LLVM
; RUN: llc < %s -march=x86-64 > %t
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; RUN: grep movb %t | count 1
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; RUN: grep "movzb[wl]" %t
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define void @handle_vector_size_attribute() nounwind {
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entry:
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%tmp69 = load i32* null ; <i32> [#uses=1]
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switch i32 %tmp69, label %bb84 [
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i32 2, label %bb77
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i32 1, label %bb77
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]
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bb77: ; preds = %entry, %entry
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%tmp99 = udiv i64 0, 0 ; <i64> [#uses=1]
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%tmp = load i8* null ; <i8> [#uses=1]
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%tmp114 = icmp eq i64 0, 0 ; <i1> [#uses=1]
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br label %cond_true115
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bb84: ; preds = %entry
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ret void
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cond_true115: ; preds = %bb77
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%tmp118 = load i8* null ; <i8> [#uses=1]
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br label %cond_true120
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cond_true120: ; preds = %cond_true115
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%tmp127 = udiv i8 %tmp, %tmp118 ; <i8> [#uses=1]
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%tmp127.upgrd.1 = zext i8 %tmp127 to i64 ; <i64> [#uses=1]
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br label %cond_next129
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cond_next129: ; preds = %cond_true120, %cond_true115
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%iftmp.30.0 = phi i64 [ %tmp127.upgrd.1, %cond_true120 ] ; <i64> [#uses=1]
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%tmp132 = icmp eq i64 %iftmp.30.0, %tmp99 ; <i1> [#uses=1]
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br i1 %tmp132, label %cond_false148, label %cond_next136
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cond_next136: ; preds = %cond_next129, %bb77
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ret void
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cond_false148: ; preds = %cond_next129
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ret void
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}
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