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f52e519898
The long branch pass (fixed in r160601) no longer uses the global base register to compute addresses of branch destinations, so it is not necessary to reserve a slot on the stack. llvm-svn: 160703
35 lines
1014 B
LLVM
35 lines
1014 B
LLVM
; RUN: llc -march=mips < %s | FileCheck %s
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define void @f1(i64 %ll1, float %f, i64 %ll, i32 %i, float %f2) nounwind {
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entry:
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; CHECK: addu $[[R1:[0-9]+]], $zero, $5
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; CHECK: addu $[[R0:[0-9]+]], $zero, $4
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; CHECK: ori $6, ${{[0-9]+}}, 3855
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; CHECK: ori $7, ${{[0-9]+}}, 22136
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; CHECK: lw $25, %call16(ff1)
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; CHECK: jalr
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tail call void @ff1(i32 %i, i64 1085102592623924856) nounwind
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; CHECK: lw $25, %call16(ff2)
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; CHECK: lw $[[R2:[0-9]+]], 80($sp)
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; CHECK: lw $[[R3:[0-9]+]], 84($sp)
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; CHECK: addu $4, $zero, $[[R2]]
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; CHECK: addu $5, $zero, $[[R3]]
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; CHECK: jalr $25
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tail call void @ff2(i64 %ll, double 3.000000e+00) nounwind
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%sub = add nsw i32 %i, -1
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; CHECK: sw $[[R1]], 28($sp)
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; CHECK: sw $[[R0]], 24($sp)
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; CHECK: lw $25, %call16(ff3)
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; CHECK: addu $6, $zero, $[[R2]]
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; CHECK: addu $7, $zero, $[[R3]]
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; CHECK: jalr $25
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tail call void @ff3(i32 %i, i64 %ll, i32 %sub, i64 %ll1) nounwind
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ret void
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}
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declare void @ff1(i32, i64)
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declare void @ff2(i64, double)
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declare void @ff3(i32, i64, i32, i64)
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