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https://github.com/RPCS3/llvm-mirror.git
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4ca961430f
The new target machines are: nvptx (old ptx32) => 32-bit PTX nvptx64 (old ptx64) => 64-bit PTX The sources are based on the internal NVIDIA NVPTX back-end, and contain more functionality than the current PTX back-end currently provides. NV_CONTRIB llvm-svn: 156196
285 lines
6.1 KiB
LLVM
285 lines
6.1 KiB
LLVM
; RUN: llc < %s -march=nvptx -mcpu=sm_10 | FileCheck %s
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_10 | FileCheck %s
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; RUN: llc < %s -march=nvptx -mcpu=sm_20 | FileCheck %s
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; RUN: llc < %s -march=nvptx64 -mcpu=sm_20 | FileCheck %s
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define ptx_device i32 @test_tid_x() {
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; CHECK: mov.u32 %r0, %tid.x;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.tid.x()
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ret i32 %x
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}
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define ptx_device i32 @test_tid_y() {
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; CHECK: mov.u32 %r0, %tid.y;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.tid.y()
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ret i32 %x
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}
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define ptx_device i32 @test_tid_z() {
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; CHECK: mov.u32 %r0, %tid.z;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.tid.z()
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ret i32 %x
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}
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define ptx_device i32 @test_tid_w() {
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; CHECK: mov.u32 %r0, %tid.w;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.tid.w()
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ret i32 %x
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}
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define ptx_device i32 @test_ntid_x() {
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; CHECK: mov.u32 %r0, %ntid.x;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.ntid.x()
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ret i32 %x
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}
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define ptx_device i32 @test_ntid_y() {
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; CHECK: mov.u32 %r0, %ntid.y;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.ntid.y()
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ret i32 %x
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}
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define ptx_device i32 @test_ntid_z() {
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; CHECK: mov.u32 %r0, %ntid.z;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.ntid.z()
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ret i32 %x
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}
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define ptx_device i32 @test_ntid_w() {
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; CHECK: mov.u32 %r0, %ntid.w;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.ntid.w()
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ret i32 %x
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}
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define ptx_device i32 @test_laneid() {
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; CHECK: mov.u32 %r0, %laneid;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.laneid()
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ret i32 %x
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}
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define ptx_device i32 @test_warpid() {
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; CHECK: mov.u32 %r0, %warpid;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.warpid()
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ret i32 %x
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}
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define ptx_device i32 @test_nwarpid() {
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; CHECK: mov.u32 %r0, %nwarpid;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.nwarpid()
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ret i32 %x
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}
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define ptx_device i32 @test_ctaid_x() {
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; CHECK: mov.u32 %r0, %ctaid.x;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.ctaid.x()
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ret i32 %x
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}
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define ptx_device i32 @test_ctaid_y() {
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; CHECK: mov.u32 %r0, %ctaid.y;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.ctaid.y()
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ret i32 %x
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}
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define ptx_device i32 @test_ctaid_z() {
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; CHECK: mov.u32 %r0, %ctaid.z;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.ctaid.z()
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ret i32 %x
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}
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define ptx_device i32 @test_ctaid_w() {
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; CHECK: mov.u32 %r0, %ctaid.w;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.ctaid.w()
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ret i32 %x
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}
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define ptx_device i32 @test_nctaid_x() {
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; CHECK: mov.u32 %r0, %nctaid.x;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.nctaid.x()
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ret i32 %x
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}
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define ptx_device i32 @test_nctaid_y() {
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; CHECK: mov.u32 %r0, %nctaid.y;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.nctaid.y()
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ret i32 %x
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}
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define ptx_device i32 @test_nctaid_z() {
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; CHECK: mov.u32 %r0, %nctaid.z;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.nctaid.z()
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ret i32 %x
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}
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define ptx_device i32 @test_nctaid_w() {
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; CHECK: mov.u32 %r0, %nctaid.w;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.nctaid.w()
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ret i32 %x
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}
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define ptx_device i32 @test_smid() {
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; CHECK: mov.u32 %r0, %smid;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.smid()
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ret i32 %x
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}
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define ptx_device i32 @test_nsmid() {
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; CHECK: mov.u32 %r0, %nsmid;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.nsmid()
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ret i32 %x
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}
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define ptx_device i32 @test_gridid() {
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; CHECK: mov.u32 %r0, %gridid;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.gridid()
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ret i32 %x
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}
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define ptx_device i32 @test_lanemask_eq() {
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; CHECK: mov.u32 %r0, %lanemask_eq;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.lanemask.eq()
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ret i32 %x
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}
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define ptx_device i32 @test_lanemask_le() {
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; CHECK: mov.u32 %r0, %lanemask_le;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.lanemask.le()
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ret i32 %x
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}
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define ptx_device i32 @test_lanemask_lt() {
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; CHECK: mov.u32 %r0, %lanemask_lt;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.lanemask.lt()
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ret i32 %x
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}
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define ptx_device i32 @test_lanemask_ge() {
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; CHECK: mov.u32 %r0, %lanemask_ge;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.lanemask.ge()
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ret i32 %x
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}
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define ptx_device i32 @test_lanemask_gt() {
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; CHECK: mov.u32 %r0, %lanemask_gt;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.lanemask.gt()
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ret i32 %x
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}
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define ptx_device i32 @test_clock() {
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; CHECK: mov.u32 %r0, %clock;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.clock()
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ret i32 %x
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}
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define ptx_device i64 @test_clock64() {
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; CHECK: mov.u64 %rl0, %clock64;
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; CHECK: ret;
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%x = call i64 @llvm.ptx.read.clock64()
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ret i64 %x
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}
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define ptx_device i32 @test_pm0() {
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; CHECK: mov.u32 %r0, %pm0;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.pm0()
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ret i32 %x
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}
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define ptx_device i32 @test_pm1() {
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; CHECK: mov.u32 %r0, %pm1;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.pm1()
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ret i32 %x
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}
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define ptx_device i32 @test_pm2() {
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; CHECK: mov.u32 %r0, %pm2;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.pm2()
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ret i32 %x
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}
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define ptx_device i32 @test_pm3() {
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; CHECK: mov.u32 %r0, %pm3;
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; CHECK: ret;
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%x = call i32 @llvm.ptx.read.pm3()
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ret i32 %x
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}
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define ptx_device void @test_bar_sync() {
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; CHECK: bar.sync 0
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; CHECK: ret;
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call void @llvm.ptx.bar.sync(i32 0)
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ret void
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}
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declare i32 @llvm.ptx.read.tid.x()
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declare i32 @llvm.ptx.read.tid.y()
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declare i32 @llvm.ptx.read.tid.z()
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declare i32 @llvm.ptx.read.tid.w()
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declare i32 @llvm.ptx.read.ntid.x()
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declare i32 @llvm.ptx.read.ntid.y()
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declare i32 @llvm.ptx.read.ntid.z()
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declare i32 @llvm.ptx.read.ntid.w()
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declare i32 @llvm.ptx.read.laneid()
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declare i32 @llvm.ptx.read.warpid()
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declare i32 @llvm.ptx.read.nwarpid()
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declare i32 @llvm.ptx.read.ctaid.x()
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declare i32 @llvm.ptx.read.ctaid.y()
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declare i32 @llvm.ptx.read.ctaid.z()
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declare i32 @llvm.ptx.read.ctaid.w()
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declare i32 @llvm.ptx.read.nctaid.x()
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declare i32 @llvm.ptx.read.nctaid.y()
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declare i32 @llvm.ptx.read.nctaid.z()
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declare i32 @llvm.ptx.read.nctaid.w()
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declare i32 @llvm.ptx.read.smid()
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declare i32 @llvm.ptx.read.nsmid()
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declare i32 @llvm.ptx.read.gridid()
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declare i32 @llvm.ptx.read.lanemask.eq()
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declare i32 @llvm.ptx.read.lanemask.le()
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declare i32 @llvm.ptx.read.lanemask.lt()
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declare i32 @llvm.ptx.read.lanemask.ge()
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declare i32 @llvm.ptx.read.lanemask.gt()
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declare i32 @llvm.ptx.read.clock()
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declare i64 @llvm.ptx.read.clock64()
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declare i32 @llvm.ptx.read.pm0()
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declare i32 @llvm.ptx.read.pm1()
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declare i32 @llvm.ptx.read.pm2()
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declare i32 @llvm.ptx.read.pm3()
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declare void @llvm.ptx.bar.sync(i32 %i)
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