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c53d5db613
Summary: Add support for Cortex-A65, Cortex-A65AE, Neoverse E1 and Neoverse N1. Neoverse E1 and Cortex-A65(&AE) only implement the AArch64 state of the Arm architecture. Neoverse N1 implements both AArch32 and AArch64. Cortex-A65: https://developer.arm.com/ip-products/processors/cortex-a/cortex-a65 Cortex-A65AE: https://developer.arm.com/ip-products/processors/cortex-a/cortex-a65ae Neoverse E1: https://developer.arm.com/ip-products/processors/neoverse/neoverse-e1 Neoverse N1: https://developer.arm.com/ip-products/processors/neoverse/neoverse-n1 Patch by Diogo Sampaio and Pablo Barrio Reviewers: samparker, LukeCheeseman, sbaranga, ostannard Reviewed By: ostannard Subscribers: ostannard, javed.absar, kristof.beyls, hiraditya, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D64406 llvm-svn: 367007
89 lines
4.3 KiB
ArmAsm
89 lines
4.3 KiB
ArmAsm
// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+spe < %s | FileCheck %s
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// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mcpu=neoverse-n1 < %s | FileCheck %s
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// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding < %s 2>&1 | FileCheck --check-prefix=NO_SPE %s
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psb csync
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// CHECK: psb csync // encoding: [0x3f,0x22,0x03,0xd5]
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// NO_SPE: instruction requires: spe
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msr pmblimitr_el1, x0
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msr pmbptr_el1, x0
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msr pmbsr_el1, x0
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msr pmbidr_el1, x0
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msr pmscr_el2, x0
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msr pmscr_el12, x0
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msr pmscr_el1, x0
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msr pmsicr_el1, x0
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msr pmsirr_el1, x0
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msr pmsfcr_el1, x0
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msr pmsevfr_el1, x0
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msr pmslatfr_el1, x0
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msr pmsidr_el1, x0
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// CHECK: msr PMBLIMITR_EL1, x0 // encoding: [0x00,0x9a,0x18,0xd5]
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// CHECK: msr PMBPTR_EL1, x0 // encoding: [0x20,0x9a,0x18,0xd5]
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// CHECK: msr PMBSR_EL1, x0 // encoding: [0x60,0x9a,0x18,0xd5]
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// CHECK: msr PMBIDR_EL1, x0 // encoding: [0xe0,0x9a,0x18,0xd5]
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// CHECK: msr PMSCR_EL2, x0 // encoding: [0x00,0x99,0x1c,0xd5]
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// CHECK: msr PMSCR_EL12, x0 // encoding: [0x00,0x99,0x1d,0xd5]
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// CHECK: msr PMSCR_EL1, x0 // encoding: [0x00,0x99,0x18,0xd5]
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// CHECK: msr PMSICR_EL1, x0 // encoding: [0x40,0x99,0x18,0xd5]
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// CHECK: msr PMSIRR_EL1, x0 // encoding: [0x60,0x99,0x18,0xd5]
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// CHECK: msr PMSFCR_EL1, x0 // encoding: [0x80,0x99,0x18,0xd5]
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// CHECK: msr PMSEVFR_EL1, x0 // encoding: [0xa0,0x99,0x18,0xd5]
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// CHECK: msr PMSLATFR_EL1, x0 // encoding: [0xc0,0x99,0x18,0xd5]
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// CHECK: msr PMSIDR_EL1, x0 // encoding: [0xe0,0x99,0x18,0xd5]
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// NO_SPE: error: expected writable system register or pstate
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// NO_SPE: error: expected writable system register or pstate
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// NO_SPE: error: expected writable system register or pstate
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// NO_SPE: error: expected writable system register or pstate
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// NO_SPE: error: expected writable system register or pstate
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// NO_SPE: error: expected writable system register or pstate
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// NO_SPE: error: expected writable system register or pstate
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// NO_SPE: error: expected writable system register or pstate
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// NO_SPE: error: expected writable system register or pstate
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// NO_SPE: error: expected writable system register or pstate
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// NO_SPE: error: expected writable system register or pstate
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// NO_SPE: error: expected writable system register or pstate
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// NO_SPE: error: expected writable system register or pstate
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mrs x0, pmblimitr_el1
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mrs x0, pmbptr_el1
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mrs x0, pmbsr_el1
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mrs x0, pmbidr_el1
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mrs x0, pmscr_el2
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mrs x0, pmscr_el12
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mrs x0, pmscr_el1
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mrs x0, pmsicr_el1
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mrs x0, pmsirr_el1
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mrs x0, pmsfcr_el1
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mrs x0, pmsevfr_el1
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mrs x0, pmslatfr_el1
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mrs x0, pmsidr_el1
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// CHECK: mrs x0, PMBLIMITR_EL1 // encoding: [0x00,0x9a,0x38,0xd5]
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// CHECK: mrs x0, PMBPTR_EL1 // encoding: [0x20,0x9a,0x38,0xd5]
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// CHECK: mrs x0, PMBSR_EL1 // encoding: [0x60,0x9a,0x38,0xd5]
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// CHECK: mrs x0, PMBIDR_EL1 // encoding: [0xe0,0x9a,0x38,0xd5]
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// CHECK: mrs x0, PMSCR_EL2 // encoding: [0x00,0x99,0x3c,0xd5]
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// CHECK: mrs x0, PMSCR_EL12 // encoding: [0x00,0x99,0x3d,0xd5]
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// CHECK: mrs x0, PMSCR_EL1 // encoding: [0x00,0x99,0x38,0xd5]
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// CHECK: mrs x0, PMSICR_EL1 // encoding: [0x40,0x99,0x38,0xd5]
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// CHECK: mrs x0, PMSIRR_EL1 // encoding: [0x60,0x99,0x38,0xd5]
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// CHECK: mrs x0, PMSFCR_EL1 // encoding: [0x80,0x99,0x38,0xd5]
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// CHECK: mrs x0, PMSEVFR_EL1 // encoding: [0xa0,0x99,0x38,0xd5]
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// CHECK: mrs x0, PMSLATFR_EL1 // encoding: [0xc0,0x99,0x38,0xd5]
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// CHECK: mrs x0, PMSIDR_EL1 // encoding: [0xe0,0x99,0x38,0xd5]
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// NO_SPE: error: expected readable system register
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// NO_SPE: error: expected readable system register
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// NO_SPE: error: expected readable system register
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// NO_SPE: error: expected readable system register
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// NO_SPE: error: expected readable system register
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// NO_SPE: error: expected readable system register
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// NO_SPE: error: expected readable system register
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// NO_SPE: error: expected readable system register
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// NO_SPE: error: expected readable system register
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// NO_SPE: error: expected readable system register
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// NO_SPE: error: expected readable system register
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// NO_SPE: error: expected readable system register
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// NO_SPE: error: expected readable system register
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