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6c7d4031e4
Fix for PR27726 - sitofp i64 to fp128 was loading the merged load i64 to a x87 register preventing legalization for conversion to fp128. Added 32-bit tests for fp128 cast/conversions. llvm-svn: 273210
362 lines
9.4 KiB
LLVM
362 lines
9.4 KiB
LLVM
; RUN: llc < %s -O2 -mtriple=x86_64-linux-android -mattr=+mmx | FileCheck %s --check-prefix=X64
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; RUN: llc < %s -O2 -mtriple=x86_64-linux-gnu -mattr=+mmx | FileCheck %s --check-prefix=X64
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; RUN: llc < %s -O2 -mtriple=i686-linux-gnu -mattr=+mmx | FileCheck %s --check-prefix=X32
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; Check soft floating point conversion function calls.
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@vi32 = common global i32 0, align 4
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@vi64 = common global i64 0, align 8
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@vu32 = common global i32 0, align 4
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@vu64 = common global i64 0, align 8
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@vf32 = common global float 0.000000e+00, align 4
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@vf64 = common global double 0.000000e+00, align 8
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@vf128 = common global fp128 0xL00000000000000000000000000000000, align 16
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define void @TestFPExtF32_F128() {
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entry:
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%0 = load float, float* @vf32, align 4
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%conv = fpext float %0 to fp128
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store fp128 %conv, fp128* @vf128, align 16
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ret void
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; X32-LABEL: TestFPExtF32_F128:
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; X32: flds vf32
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; X32: fstps
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; X32: calll __extendsftf2
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; X32: retl
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;
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; X64-LABEL: TestFPExtF32_F128:
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; X64: movss vf32(%rip), %xmm0
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; X64-NEXT: callq __extendsftf2
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; X64-NEXT: movaps %xmm0, vf128(%rip)
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; X64: retq
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}
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define void @TestFPExtF64_F128() {
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entry:
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%0 = load double, double* @vf64, align 8
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%conv = fpext double %0 to fp128
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store fp128 %conv, fp128* @vf128, align 16
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ret void
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; X32-LABEL: TestFPExtF64_F128:
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; X32: fldl vf64
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; X32: fstpl
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; X32: calll __extenddftf2
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; X32: retl
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;
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; X64-LABEL: TestFPExtF64_F128:
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; X64: movsd vf64(%rip), %xmm0
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; X64-NEXT: callq __extenddftf2
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; X64-NEXT: movapd %xmm0, vf128(%rip)
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; X64: ret
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}
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define void @TestFPToSIF128_I32() {
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entry:
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%0 = load fp128, fp128* @vf128, align 16
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%conv = fptosi fp128 %0 to i32
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store i32 %conv, i32* @vi32, align 4
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ret void
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; X32-LABEL: TestFPToSIF128_I32:
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; X32: calll __fixtfsi
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; X32: retl
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;
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; X64-LABEL: TestFPToSIF128_I32:
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; X64: movaps vf128(%rip), %xmm0
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; X64-NEXT: callq __fixtfsi
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; X64-NEXT: movl %eax, vi32(%rip)
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; X64: retq
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}
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define void @TestFPToUIF128_U32() {
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entry:
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%0 = load fp128, fp128* @vf128, align 16
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%conv = fptoui fp128 %0 to i32
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store i32 %conv, i32* @vu32, align 4
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ret void
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; X32-LABEL: TestFPToUIF128_U32:
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; X32: calll __fixunstfsi
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; X32: retl
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;
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; X64-LABEL: TestFPToUIF128_U32:
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; X64: movaps vf128(%rip), %xmm0
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; X64-NEXT: callq __fixunstfsi
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; X64-NEXT: movl %eax, vu32(%rip)
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; X64: retq
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}
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define void @TestFPToSIF128_I64() {
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entry:
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%0 = load fp128, fp128* @vf128, align 16
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%conv = fptosi fp128 %0 to i32
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%conv1 = sext i32 %conv to i64
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store i64 %conv1, i64* @vi64, align 8
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ret void
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; X32-LABEL: TestFPToSIF128_I64:
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; X32: calll __fixtfsi
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; X32: retl
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;
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; X64-LABEL: TestFPToSIF128_I64:
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; X64: movaps vf128(%rip), %xmm0
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; X64-NEXT: callq __fixtfsi
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; X64-NEXT: cltq
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; X64-NEXT: movq %rax, vi64(%rip)
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; X64: retq
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}
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define void @TestFPToUIF128_U64() {
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entry:
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%0 = load fp128, fp128* @vf128, align 16
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%conv = fptoui fp128 %0 to i32
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%conv1 = zext i32 %conv to i64
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store i64 %conv1, i64* @vu64, align 8
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ret void
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; X32-LABEL: TestFPToUIF128_U64:
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; X32: calll __fixunstfsi
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; X32: retl
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;
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; X64-LABEL: TestFPToUIF128_U64:
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; X64: movaps vf128(%rip), %xmm0
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; X64-NEXT: callq __fixunstfsi
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; X64-NEXT: movl %eax, %eax
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; X64-NEXT: movq %rax, vu64(%rip)
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; X64: retq
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}
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define void @TestFPTruncF128_F32() {
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entry:
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%0 = load fp128, fp128* @vf128, align 16
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%conv = fptrunc fp128 %0 to float
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store float %conv, float* @vf32, align 4
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ret void
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; X32-LABEL: TestFPTruncF128_F32:
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; X32: calll __trunctfsf2
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; X32: fstps vf32
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; X32: retl
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;
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; X64-LABEL: TestFPTruncF128_F32:
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; X64: movaps vf128(%rip), %xmm0
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; X64-NEXT: callq __trunctfsf2
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; X64-NEXT: movss %xmm0, vf32(%rip)
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; X64: retq
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}
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define void @TestFPTruncF128_F64() {
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entry:
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%0 = load fp128, fp128* @vf128, align 16
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%conv = fptrunc fp128 %0 to double
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store double %conv, double* @vf64, align 8
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ret void
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; X32-LABEL: TestFPTruncF128_F64:
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; X32: calll __trunctfdf2
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; X32: fstpl vf64
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; X32: retl
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;
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; X64-LABEL: TestFPTruncF128_F64:
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; X64: movapd vf128(%rip), %xmm0
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; X64-NEXT: callq __trunctfdf2
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; X64-NEXT: movsd %xmm0, vf64(%rip)
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; X64: retq
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}
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define void @TestSIToFPI32_F128() {
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entry:
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%0 = load i32, i32* @vi32, align 4
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%conv = sitofp i32 %0 to fp128
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store fp128 %conv, fp128* @vf128, align 16
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ret void
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; X32-LABEL: TestSIToFPI32_F128:
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; X32: calll __floatsitf
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; X32: retl
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;
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; X64-LABEL: TestSIToFPI32_F128:
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; X64: movl vi32(%rip), %edi
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; X64-NEXT: callq __floatsitf
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; X64-NEXT: movaps %xmm0, vf128(%rip)
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; X64: retq
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}
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define void @TestUIToFPU32_F128() #2 {
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entry:
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%0 = load i32, i32* @vu32, align 4
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%conv = uitofp i32 %0 to fp128
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store fp128 %conv, fp128* @vf128, align 16
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ret void
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; X32-LABEL: TestUIToFPU32_F128:
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; X32: calll __floatunsitf
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; X32: retl
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;
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; X64-LABEL: TestUIToFPU32_F128:
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; X64: movl vu32(%rip), %edi
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; X64-NEXT: callq __floatunsitf
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; X64-NEXT: movaps %xmm0, vf128(%rip)
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; X64: retq
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}
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define void @TestSIToFPI64_F128(){
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entry:
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%0 = load i64, i64* @vi64, align 8
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%conv = sitofp i64 %0 to fp128
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store fp128 %conv, fp128* @vf128, align 16
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ret void
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; X32-LABEL: TestSIToFPI64_F128:
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; X32: calll __floatditf
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; X32: retl
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;
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; X64-LABEL: TestSIToFPI64_F128:
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; X64: movq vi64(%rip), %rdi
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; X64-NEXT: callq __floatditf
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; X64-NEXT: movaps %xmm0, vf128(%rip)
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; X64: retq
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}
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define void @TestUIToFPU64_F128() #2 {
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entry:
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%0 = load i64, i64* @vu64, align 8
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%conv = uitofp i64 %0 to fp128
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store fp128 %conv, fp128* @vf128, align 16
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ret void
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; X32-LABEL: TestUIToFPU64_F128:
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; X32: calll __floatunditf
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; X32: retl
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;
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; X64-LABEL: TestUIToFPU64_F128:
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; X64: movq vu64(%rip), %rdi
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; X64-NEXT: callq __floatunditf
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; X64-NEXT: movaps %xmm0, vf128(%rip)
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; X64: retq
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}
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define i32 @TestConst128(fp128 %v) {
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entry:
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%cmp = fcmp ogt fp128 %v, 0xL00000000000000003FFF000000000000
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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; X32-LABEL: TestConst128:
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; X32: calll __gttf2
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; X32: retl
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;
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; X64-LABEL: TestConst128:
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; X64: movaps {{.*}}, %xmm1
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; X64-NEXT: callq __gttf2
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; X64-NEXT: test
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; X64: retq
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}
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; C code:
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; struct TestBits_ieee_ext {
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; unsigned v1;
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; unsigned v2;
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; };
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; union TestBits_LDU {
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; FP128 ld;
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; struct TestBits_ieee_ext bits;
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; };
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; int TestBits128(FP128 ld) {
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; union TestBits_LDU u;
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; u.ld = ld * ld;
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; return ((u.bits.v1 | u.bits.v2) == 0);
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; }
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define i32 @TestBits128(fp128 %ld) {
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entry:
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%mul = fmul fp128 %ld, %ld
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%0 = bitcast fp128 %mul to i128
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%shift = lshr i128 %0, 32
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%or5 = or i128 %shift, %0
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%or = trunc i128 %or5 to i32
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%cmp = icmp eq i32 %or, 0
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%conv = zext i1 %cmp to i32
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ret i32 %conv
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; X32-LABEL: TestBits128:
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; X32: calll __multf3
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; X32: retl
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;
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; X64-LABEL: TestBits128:
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; X64: movaps %xmm0, %xmm1
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; X64-NEXT: callq __multf3
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; X64-NEXT: movaps %xmm0, (%rsp)
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; X64-NEXT: movq (%rsp),
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; X64-NEXT: movq %
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; X64-NEXT: shrq $32,
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; X64: orl
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; X64-NEXT: sete %al
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; X64-NEXT: movzbl %al, %eax
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; X64: retq
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;
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; If TestBits128 fails due to any llvm or clang change,
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; please make sure the original simplified C code will
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; be compiled into correct IL and assembly code, not
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; just this TestBits128 test case. Better yet, try to
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; test the whole libm and its test cases.
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}
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; C code: (compiled with -target x86_64-linux-android)
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; typedef long double __float128;
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; __float128 TestPair128(unsigned long a, unsigned long b) {
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; unsigned __int128 n;
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; unsigned __int128 v1 = ((unsigned __int128)a << 64);
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; unsigned __int128 v2 = (unsigned __int128)b;
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; n = (v1 | v2) + 3;
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; return *(__float128*)&n;
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; }
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define fp128 @TestPair128(i64 %a, i64 %b) {
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entry:
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%conv = zext i64 %a to i128
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%shl = shl nuw i128 %conv, 64
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%conv1 = zext i64 %b to i128
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%or = or i128 %shl, %conv1
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%add = add i128 %or, 3
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%0 = bitcast i128 %add to fp128
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ret fp128 %0
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; X32-LABEL: TestPair128:
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; X32: addl
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; X32-NEXT: adcl
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; X32-NEXT: adcl
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; X32-NEXT: adcl
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; X32: retl
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;
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; X64-LABEL: TestPair128:
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; X64: addq $3, %rsi
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; X64: movq %rsi, -24(%rsp)
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; X64: movq %rdi, -16(%rsp)
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; X64: movaps -24(%rsp), %xmm0
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; X64-NEXT: retq
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}
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define fp128 @TestTruncCopysign(fp128 %x, i32 %n) {
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entry:
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%cmp = icmp sgt i32 %n, 50000
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br i1 %cmp, label %if.then, label %cleanup
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if.then: ; preds = %entry
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%conv = fptrunc fp128 %x to double
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%call = tail call double @copysign(double 0x7FF0000000000000, double %conv) #2
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%conv1 = fpext double %call to fp128
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br label %cleanup
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cleanup: ; preds = %entry, %if.then
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%retval.0 = phi fp128 [ %conv1, %if.then ], [ %x, %entry ]
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ret fp128 %retval.0
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; X32-LABEL: TestTruncCopysign:
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; X32: calll __trunctfdf2
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; X32: fstpl
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; X32: flds
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; X32: flds
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; X32: fstp
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; X32: fldz
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; X32: fstp
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; X32: fstpl
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; X32: calll __extenddftf2
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; X32: retl
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;
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; X64-LABEL: TestTruncCopysign:
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; X64: callq __trunctfdf2
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; X64-NEXT: andpd {{.*}}, %xmm0
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; X64-NEXT: orpd {{.*}}, %xmm0
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; X64-NEXT: callq __extenddftf2
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; X64: retq
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}
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declare double @copysign(double, double) #1
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attributes #2 = { nounwind readnone }
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