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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-23 04:52:54 +02:00
llvm-mirror/test/TableGen
Nicolai Haehnle 33d8a7c561 TableGen: Add a defset statement
Allows capturing a list of concrete instantiated defs.

This can be combined with foreach to create parallel sets of def
instantiations with less repetition in the source. This purpose is
largely also served by multiclasses, but in some cases multiclasses
can't be used.

The motivating example for this change is having a large set of
intrinsics, which are generated from the IntrinsicsBackend.td file
included by Intrinsics.td, and a corresponding set of instruction
selection patterns, which are generated via the backend's .td files.

Multiclasses cannot be used to eliminate the redundancy in this case,
because a multiclass cannot span both LLVM's common .td files and
the backend .td files at the same time.

Change-Id: I879e35042dceea542a5e6776fad23c5e0e69e76b

Differential revision: https://reviews.llvm.org/D44109

llvm-svn: 327121
2018-03-09 12:24:42 +00:00
..
2003-08-03-PassCode.td
2006-09-18-LargeInt.td
2010-03-24-PrematureDefaults.td
AllowDuplicateRegisterNames.td [TableGen] Give the option of tolerating duplicate register names 2017-12-07 09:51:55 +00:00
AnonDefinitionOnDemand.td TableGen: Delay instantiating inline anonymous records 2018-03-06 13:49:01 +00:00
AsmPredicateCondsEmission.td
AsmVariant.td [TableGen] Add a proper namespace to an Instruction in an AsmMatcher test. This is required after r307358. 2017-07-07 05:50:45 +00:00
BitOffsetDecoder.td TableGen: Explicitly check whether a record has been resolved 2018-03-06 13:48:47 +00:00
BitsInit.td TableGen: Allow !cast of records, cleanup conversion machinery 2018-03-06 13:48:39 +00:00
BitsInitOverflow.td TableGen: Explicitly check whether a record has been resolved 2018-03-06 13:48:47 +00:00
cast-list-initializer.td
cast.td
ClassInstanceValue.td
code.td TableGen: Allow !cast of records, cleanup conversion machinery 2018-03-06 13:48:39 +00:00
ConcatenatedSubregs.td Address r311914 review comments 2017-08-28 20:11:27 +00:00
CStyleComment.td
Dag.td
defmclass.td
DefmInherit.td
DefmInsideMultiClass.td
defset-typeerror.td TableGen: Add a defset statement 2018-03-09 12:24:42 +00:00
defset.td TableGen: Add a defset statement 2018-03-09 12:24:42 +00:00
DuplicateFieldValues.td
eq.td
eqbit.td
FieldAccess.td TableGen: Allow !cast of records, cleanup conversion machinery 2018-03-06 13:48:39 +00:00
foldl.td TableGen: Add !foldl operation 2018-03-06 13:49:16 +00:00
foreach-eval.td TableGen: Reimplement !foreach using the resolving mechanism 2018-03-05 15:21:04 +00:00
foreach-leak.td TableGen: Reimplement !foreach using the resolving mechanism 2018-03-05 15:21:04 +00:00
foreach.td TableGen: Reimplement !foreach using the resolving mechanism 2018-03-05 15:21:04 +00:00
ForeachList.td TableGen: Allow arbitrary list values as ranges of foreach 2018-03-09 12:24:30 +00:00
ForeachLoop.td
ForwardRef.td
GeneralList.td
GlobalISelEmitter.td [GISel]: Make GlobalISelEmitter rule prioritization compatible with selectionDAG 2018-02-16 22:37:15 +00:00
HwModeSelect.td TableGen support for parameterized register class information 2017-09-14 16:56:21 +00:00
if-empty-list-arg.td
if-type.td TableGen: Generalize record types to fix typeIsConvertibleTo et al. 2018-03-06 13:48:20 +00:00
if.td TableGen: Generalize record types to fix typeIsConvertibleTo et al. 2018-03-06 13:48:20 +00:00
ifbit.td
Include.inc
Include.td
IntBitInit.td
intrinsic-long-name.td TableGen: Allow setting SDNodeProperties on intrinsics 2017-12-20 19:36:28 +00:00
intrinsic-struct.td TableGen: Allow setting SDNodeProperties on intrinsics 2017-12-20 19:36:28 +00:00
intrinsic-varargs.td TableGen: Allow setting SDNodeProperties on intrinsics 2017-12-20 19:36:28 +00:00
isa.td TableGen: add !isa operation 2018-03-09 12:24:06 +00:00
LazyChange.td
LetInsideMultiClasses.td
lisp.td
list-element-bitref.td
ListArgs.td
ListArgsSimple.td
listconcat.td TableGen: Generalize type deduction for !listconcat 2018-02-22 15:26:28 +00:00
ListConversion.td
ListManip.td
ListOfList.td
ListSlices.td
lit.local.cfg
LoLoL.td
math.td
MultiClass-defm-fail.td TableGen: Allow NAME in template arguments in defm in multiclass 2018-03-05 14:01:38 +00:00
MultiClass-defm.td TableGen: Allow NAME in template arguments in defm in multiclass 2018-03-05 14:01:38 +00:00
MultiClass.td
MultiClassDefName.td
MultiClassInherit.td
MultiPat.td TableGen: Reimplement !foreach using the resolving mechanism 2018-03-05 15:21:04 +00:00
nested-comment.td
NestedForeach.td
Paste.td
pr8330.td
RegisterBankEmitter.td
RegisterEncoder.td
RelTest.td [mips] Improve diagnostics for instruction mapping 2018-01-08 16:25:40 +00:00
SetTheory.td
SiblingForeach.td
size.td TableGen: Add !size operation 2018-02-23 10:46:07 +00:00
Slice.td
strconcat.td
String.td
subst2.td
subst.td
SuperSubclassSameName.td
TargetInstrInfo.td
TargetInstrSpec.td TableGen: Reimplement !foreach using the resolving mechanism 2018-03-05 15:21:04 +00:00
template-arg-dependency.td TableGen: Resolve all template args simultaneously in AddSubClass 2018-03-05 15:21:11 +00:00
TemplateArgRename.td
Tree.td
TreeNames.td
trydecode-emission2.td
trydecode-emission3.td
trydecode-emission.td
TwoLevelName.td
UnsetBitInit.td TableGen: Simplify BitsInit::resolveReferences 2018-03-06 13:48:30 +00:00
UnterminatedComment.td Make shell redirection construct portable 2017-07-12 13:24:46 +00:00
usevalname.td
ValidIdentifiers.td