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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-22 20:43:44 +02:00
llvm-mirror/test/CodeGen
Konstantin Zhuravlyov 407490a8b6 AMDGPU: Start selecting s_xnor_{b32, b64}
Differential Revision: https://reviews.llvm.org/D37981

llvm-svn: 313565
2017-09-18 21:22:45 +00:00
..
AArch64 [LoopVectorizer] Add more testcases for PR33804. 2017-09-18 17:28:15 +00:00
AMDGPU AMDGPU: Start selecting s_xnor_{b32, b64} 2017-09-18 21:22:45 +00:00
ARC
ARM [LoopVectorizer] Add more testcases for PR33804. 2017-09-18 17:28:15 +00:00
AVR
BPF bpf: add " ll" in the LD_IMM64 asmstring 2017-09-11 23:43:35 +00:00
Generic
Hexagon [IfConversion] More simple, correct dead/kill liveness handling 2017-09-14 15:53:11 +00:00
Inputs
Lanai
Mips [mips] Pick the right variant of DINS upfront and enable target instruction verification 2017-09-14 10:58:00 +00:00
MIR
MSP430
Nios2
NVPTX
PowerPC [XRay][CodeGen] Use the current function symbol as the associated symbol for the instrumentation map 2017-09-14 07:08:23 +00:00
SPARC
SystemZ Move llvm/test/CodeGen/X86/clear-liverange-spillreg.mir to SystemZ. It was in wrong place. 2017-09-14 00:03:23 +00:00
Thumb
Thumb2
WebAssembly [WebAssembly] Add sign extend instructions from atomics proposal 2017-09-13 00:29:06 +00:00
WinEH
X86 [DAG, x86] allow store merging before and after legalization (PR34217) 2017-09-18 20:54:26 +00:00
XCore