Sagar Thakur 5eb36c5e30 [MIPS][LLVM-MC] Fix Disassemble of Negative Offset ... Patch by Nitesh Jain. Summary: The type of Imm in MipsDisassembler.cpp was incorrect since SignExtend64 return int64_t type.As per the MIPSr6 doc ,the offset is added to the address of the instruction following the branch (not the branch itself), to form a PC-relative effective target address hence “4” is added to the offset. The offset of some test case are update to reflect the changes due to “ + 4 ” offset and new test case for negative offset are added. Reviewers: dsanders, vkalintiris Differential Revision: http://reviews.llvm.org/D17540 llvm-svn: 270542		2016-05-24 09:57:10 +00:00
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valid-mips32r6-el.txt	[MIPS][LLVM-MC] Fix Disassemble of Negative Offset	2016-05-24 09:57:10 +00:00
valid-mips32r6.txt	[MIPS][LLVM-MC] Fix Disassemble of Negative Offset	2016-05-24 09:57:10 +00:00
valid-xfail-mips32r6.txt	[Mips][Disassembler] When disassembler meets cache/pref instructions for r6 it crashes as the access to operands array is out of range. This patch adds dedicated decoder method for R6 CACHE_HINT_DESC class that properly handles decoding of these instructions.	2015-01-29 11:33:41 +00:00