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35 lines
1.2 KiB
TableGen
35 lines
1.2 KiB
TableGen
//===- BlackfinIntrinsics.td - Defines Blackfin intrinsics -*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines all of the blackfin-specific intrinsics.
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//
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//===----------------------------------------------------------------------===//
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let TargetPrefix = "bfin", isTarget = 1 in {
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//===----------------------------------------------------------------------===//
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// Core synchronisation etc.
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//
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// These intrinsics have sideeffects. Each represent a single instruction, but
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// workarounds are sometimes required depending on the cpu.
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// Execute csync instruction with workarounds
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def int_bfin_csync : GCCBuiltin<"__builtin_bfin_csync">,
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Intrinsic<[llvm_void_ty]>;
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// Execute ssync instruction with workarounds
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def int_bfin_ssync : GCCBuiltin<"__builtin_bfin_ssync">,
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Intrinsic<[llvm_void_ty]>;
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// Execute idle instruction with workarounds
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def int_bfin_idle : GCCBuiltin<"__builtin_bfin_idle">,
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Intrinsic<[llvm_void_ty]>;
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}
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