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llvm-mirror/test/CodeGen/AArch64/arm64-fast-isel-store.ll
Juergen Ributzka 410902c24a [FastISel][AArch64] Make use of the zero register when possible.
This change materializes now the value "0" from the zero register.
The zero register can be folded by several instruction, so no
materialization is need at all.

Fixes <rdar://problem/17924413>.

llvm-svn: 215591
2014-08-13 22:13:14 +00:00

31 lines
661 B
LLVM

; RUN: llc -mtriple=aarch64-unknown-unknown < %s | FileCheck %s
; RUN: llc -mtriple=aarch64-unknown-unknown -fast-isel -fast-isel-abort < %s | FileCheck %s
define void @store_i8(i8* %a) {
; CHECK-LABEL: store_i8
; CHECK: strb wzr, [x0]
store i8 0, i8* %a
ret void
}
define void @store_i16(i16* %a) {
; CHECK-LABEL: store_i16
; CHECK: strh wzr, [x0]
store i16 0, i16* %a
ret void
}
define void @store_i32(i32* %a) {
; CHECK-LABEL: store_i32
; CHECK: str wzr, [x0]
store i32 0, i32* %a
ret void
}
define void @store_i64(i64* %a) {
; CHECK-LABEL: store_i64
; CHECK: str xzr, [x0]
store i64 0, i64* %a
ret void
}