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41717f6989
1. Legalize now always promotes truncstore of i1 to i8. 2. Remove patterns and gunk related to truncstore i1 from targets. 3. Rename the StoreXAction stuff to TruncStoreAction in TLI. 4. Make the TLI TruncStoreAction table a 2d table to handle from/to conversions. 5. Mark a wide variety of invalid truncstores as such in various targets, e.g. X86 currently doesn't support truncstore of any of its integer types. 6. Add legalize support for truncstores with invalid value input types. 7. Add a dag combine transform to turn store(truncate) into truncstore when safe. The later allows us to compile CodeGen/X86/storetrunc-fp.ll to: _foo: fldt 20(%esp) fldt 4(%esp) faddp %st(1) movl 36(%esp), %eax fstps (%eax) ret instead of: _foo: subl $4, %esp fldt 24(%esp) fldt 8(%esp) faddp %st(1) fstps (%esp) movl 40(%esp), %eax movss (%esp), %xmm0 movss %xmm0, (%eax) addl $4, %esp ret llvm-svn: 46140 |
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| .. | ||
| CellSDKIntrinsics.td | ||
| Makefile | ||
| README.txt | ||
| SPU.h | ||
| SPU.td | ||
| SPUAsmPrinter.cpp | ||
| SPUCallingConv.td | ||
| SPUFrameInfo.cpp | ||
| SPUFrameInfo.h | ||
| SPUHazardRecognizers.cpp | ||
| SPUHazardRecognizers.h | ||
| SPUInstrBuilder.h | ||
| SPUInstrFormats.td | ||
| SPUInstrInfo.cpp | ||
| SPUInstrInfo.h | ||
| SPUInstrInfo.td | ||
| SPUISelDAGToDAG.cpp | ||
| SPUISelLowering.cpp | ||
| SPUISelLowering.h | ||
| SPUMachineFunction.h | ||
| SPUNodes.td | ||
| SPUOperands.td | ||
| SPURegisterInfo.cpp | ||
| SPURegisterInfo.h | ||
| SPURegisterInfo.td | ||
| SPURegisterNames.h | ||
| SPUSchedule.td | ||
| SPUSubtarget.cpp | ||
| SPUSubtarget.h | ||
| SPUTargetAsmInfo.cpp | ||
| SPUTargetAsmInfo.h | ||
| SPUTargetMachine.cpp | ||
| SPUTargetMachine.h | ||
//===- README.txt - Notes for improving CellSPU-specific code gen ---------===// This code was contributed by a team from the Computer Systems Research Department in The Aerospace Corporation: - Scott Michel (head bottle washer and much of the non-floating point instructions) - Mark Thomas (floating point instructions) - Michael AuYeung (intrinsics) - Chandler Carruth (LLVM expertise) THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, NONINFRINGEMENT, OR OTHERWISE. IN NO EVENT SHALL THE AEROSPACE CORPORATION BE LIABLE FOR DAMAGES OF ANY KIND OR NATURE WHETHER BASED IN CONTRACT, TORT, OR OTHERWISE ARISING OUT OF OR IN CONNECTION WITH THE USE OF THE SOFTWARE INCLUDING, WITHOUT LIMITATION, DAMAGES RESULTING FROM LOST OR CONTAMINATED DATA, LOST PROFITS OR REVENUE, COMPUTER MALFUNCTION, OR FOR ANY SPECIAL, INCIDENTAL, CONSEQUENTIAL, OR PUNITIVE DAMAGES, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES OR SUCH DAMAGES ARE FORESEEABLE. --------------------------------------------------------------------------- --WARNING--: --WARNING--: The CellSPU work is work-in-progress and "alpha" quality code. --WARNING--: If you are brave enough to try this code or help to hack on it, be sure to add 'spu' to configure's --enable-targets option, e.g.: ./configure <your_configure_flags_here> \ --enable-targets=x86,x86_64,powerpc,spu --------------------------------------------------------------------------- TODO: * Finish branch instructions, branch prediction These instructions were started, but only insofar as to get llvm-gcc-4.2's crtbegin.ll working (which doesn't.) * Double floating point support This was started. "What's missing?" to be filled in. * Intrinsics Lots of progress. "What's missing/incomplete?" to be filled in. ===-------------------------------------------------------------------------===