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The MicroBlaze is a highly configurable 32-bit soft-microprocessor for use on Xilinx FPGAs. For more information see: http://www.xilinx.com/tools/microblaze.htm http://en.wikipedia.org/wiki/MicroBlaze The current LLVM MicroBlaze backend generates assembly which can be compiled using the an appropriate binutils assembler. llvm-svn: 96969
80 lines
1.8 KiB
LLVM
80 lines
1.8 KiB
LLVM
; Ensure that jump tables can be handled by the mblaze backend. The
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; jump table should be lowered to a "br" instruction using one of the
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; available registers.
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;
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; RUN: llc < %s -march=mblaze | FileCheck %s
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define i32 @jmptable(i32 %arg)
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{
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; CHECK: jmptable:
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switch i32 %arg, label %DEFAULT [ i32 0, label %L0
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i32 1, label %L1
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i32 2, label %L2
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i32 3, label %L3
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i32 4, label %L4
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i32 5, label %L5
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i32 6, label %L6
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i32 7, label %L7
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i32 8, label %L8
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i32 9, label %L9 ]
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; CHECK: lw [[REG:r[0-9]*]]
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; CHECK: br [[REG]]
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L0:
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%var0 = add i32 %arg, 0
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br label %DONE
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L1:
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%var1 = add i32 %arg, 1
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br label %DONE
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L2:
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%var2 = add i32 %arg, 2
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br label %DONE
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L3:
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%var3 = add i32 %arg, 3
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br label %DONE
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L4:
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%var4 = add i32 %arg, 4
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br label %DONE
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L5:
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%var5 = add i32 %arg, 5
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br label %DONE
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L6:
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%var6 = add i32 %arg, 6
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br label %DONE
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L7:
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%var7 = add i32 %arg, 7
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br label %DONE
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L8:
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%var8 = add i32 %arg, 8
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br label %DONE
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L9:
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%var9 = add i32 %arg, 9
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br label %DONE
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DEFAULT:
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unreachable
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DONE:
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%rval = phi i32 [ %var0, %L0 ],
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[ %var1, %L1 ],
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[ %var2, %L2 ],
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[ %var3, %L3 ],
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[ %var4, %L4 ],
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[ %var5, %L5 ],
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[ %var6, %L6 ],
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[ %var7, %L7 ],
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[ %var8, %L8 ],
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[ %var9, %L9 ]
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ret i32 %rval
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; CHECK: rtsd
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}
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