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252 lines
9.1 KiB
C++
252 lines
9.1 KiB
C++
//===-- llvm/CodeGen/LiveVariables.h - Live Variable Analysis ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the LiveVariable analysis pass. For each machine
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// instruction in the function, this pass calculates the set of registers that
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// are immediately dead after the instruction (i.e., the instruction calculates
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// the value, but it is never used) and the set of registers that are used by
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// the instruction, but are never used after the instruction (i.e., they are
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// killed).
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//
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// This class computes live variables using are sparse implementation based on
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// the machine code SSA form. This class computes live variable information for
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// each virtual and _register allocatable_ physical register in a function. It
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// uses the dominance properties of SSA form to efficiently compute live
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// variables for virtual registers, and assumes that physical registers are only
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// live within a single basic block (allowing it to do a single local analysis
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// to resolve physical register lifetimes in each basic block). If a physical
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// register is not register allocatable, it is not tracked. This is useful for
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// things like the stack pointer and condition codes.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_LIVEVARIABLES_H
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#define LLVM_CODEGEN_LIVEVARIABLES_H
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include <map>
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namespace llvm {
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class MRegisterInfo;
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class LiveVariables : public MachineFunctionPass {
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public:
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struct VarInfo {
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/// DefInst - The machine instruction that defines this register.
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MachineInstr *DefInst;
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/// AliveBlocks - Set of blocks of which this value is alive completely
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/// through. This is a bit set which uses the basic block number as an
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/// index.
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///
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std::vector<bool> AliveBlocks;
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/// Kills - List of MachineInstruction's which are the last use of this
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/// virtual register (kill it) in their basic block.
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///
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std::vector<MachineInstr*> Kills;
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VarInfo() : DefInst(0) {}
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/// removeKill - Delete a kill corresponding to the specified
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/// machine instruction. Returns true if there was a kill
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/// corresponding to this instruction, false otherwise.
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bool removeKill(MachineInstr *MI) {
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for (std::vector<MachineInstr*>::iterator i = Kills.begin(),
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e = Kills.end(); i != e; ++i)
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if (*i == MI) {
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Kills.erase(i);
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return true;
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}
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return false;
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}
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};
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private:
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/// VirtRegInfo - This list is a mapping from virtual register number to
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/// variable information. FirstVirtualRegister is subtracted from the virtual
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/// register number before indexing into this list.
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///
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std::vector<VarInfo> VirtRegInfo;
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/// RegistersKilled - This multimap keeps track of all of the registers that
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/// are dead immediately after an instruction reads its operands. If an
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/// instruction does not have an entry in this map, it kills no registers.
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///
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std::multimap<MachineInstr*, unsigned> RegistersKilled;
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/// RegistersDead - This multimap keeps track of all of the registers that are
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/// dead immediately after an instruction executes, which are not dead after
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/// the operands are evaluated. In practice, this only contains registers
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/// which are defined by an instruction, but never used.
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///
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std::multimap<MachineInstr*, unsigned> RegistersDead;
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/// AllocatablePhysicalRegisters - This vector keeps track of which registers
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/// are actually register allocatable by the target machine. We can not track
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/// liveness for values that are not in this set.
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///
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std::vector<bool> AllocatablePhysicalRegisters;
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private: // Intermediate data structures
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const MRegisterInfo *RegInfo;
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MachineInstr **PhysRegInfo;
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bool *PhysRegUsed;
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void HandlePhysRegUse(unsigned Reg, MachineInstr *MI);
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void HandlePhysRegDef(unsigned Reg, MachineInstr *MI);
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public:
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virtual bool runOnMachineFunction(MachineFunction &MF);
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/// killed_iterator - Iterate over registers killed by a machine instruction
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///
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typedef std::multimap<MachineInstr*, unsigned>::iterator killed_iterator;
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/// killed_begin/end - Get access to the range of registers killed by a
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/// machine instruction.
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killed_iterator killed_begin(MachineInstr *MI) {
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return RegistersKilled.lower_bound(MI);
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}
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killed_iterator killed_end(MachineInstr *MI) {
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return RegistersKilled.upper_bound(MI);
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}
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std::pair<killed_iterator, killed_iterator>
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killed_range(MachineInstr *MI) {
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return RegistersKilled.equal_range(MI);
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}
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/// KillsRegister - Return true if the specified instruction kills the
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/// specified register.
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bool KillsRegister(MachineInstr *MI, unsigned Reg) {
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std::pair<killed_iterator, killed_iterator> KIP = killed_range(MI);
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for (; KIP.first != KIP.second; ++KIP.first)
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if (KIP.first->second == Reg)
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return true;
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return false;
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}
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killed_iterator dead_begin(MachineInstr *MI) {
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return RegistersDead.lower_bound(MI);
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}
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killed_iterator dead_end(MachineInstr *MI) {
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return RegistersDead.upper_bound(MI);
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}
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std::pair<killed_iterator, killed_iterator>
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dead_range(MachineInstr *MI) {
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return RegistersDead.equal_range(MI);
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}
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//===--------------------------------------------------------------------===//
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// API to update live variable information
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/// instructionChanged - When the address of an instruction changes, this
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/// method should be called so that live variables can update its internal
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/// data structures. This removes the records for OldMI, transfering them to
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/// the records for NewMI.
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void instructionChanged(MachineInstr *OldMI, MachineInstr *NewMI);
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/// addVirtualRegisterKilled - Add information about the fact that the
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/// specified register is killed after being used by the specified
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/// instruction.
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///
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void addVirtualRegisterKilled(unsigned IncomingReg, MachineInstr *MI) {
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RegistersKilled.insert(std::make_pair(MI, IncomingReg));
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getVarInfo(IncomingReg).Kills.push_back(MI);
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}
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/// removeVirtualRegisterKilled - Remove the specified virtual
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/// register from the live variable information. Returns true if the
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/// variable was marked as killed by the specified instruction,
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/// false otherwise.
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bool removeVirtualRegisterKilled(unsigned reg,
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MachineBasicBlock *MBB,
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MachineInstr *MI) {
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if (!getVarInfo(reg).removeKill(MI))
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return false;
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for (killed_iterator i = killed_begin(MI), e = killed_end(MI); i != e; ) {
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if (i->second == reg)
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RegistersKilled.erase(i++);
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else
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++i;
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}
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return true;
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}
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/// removeVirtualRegistersKilled - Remove all of the specified killed
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/// registers from the live variable information.
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void removeVirtualRegistersKilled(killed_iterator B, killed_iterator E) {
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for (killed_iterator I = B; I != E; ++I) { // Remove VarInfo entries...
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bool removed = getVarInfo(I->second).removeKill(I->first);
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assert(removed && "kill not in register's VarInfo?");
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}
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RegistersKilled.erase(B, E);
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}
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/// addVirtualRegisterDead - Add information about the fact that the specified
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/// register is dead after being used by the specified instruction.
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///
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void addVirtualRegisterDead(unsigned IncomingReg, MachineInstr *MI) {
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RegistersDead.insert(std::make_pair(MI, IncomingReg));
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getVarInfo(IncomingReg).Kills.push_back(MI);
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}
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/// removeVirtualRegisterDead - Remove the specified virtual
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/// register from the live variable information. Returns true if the
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/// variable was marked dead at the specified instruction, false
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/// otherwise.
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bool removeVirtualRegisterDead(unsigned reg,
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MachineBasicBlock *MBB,
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MachineInstr *MI) {
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if (!getVarInfo(reg).removeKill(MI))
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return false;
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for (killed_iterator i = killed_begin(MI), e = killed_end(MI); i != e; ) {
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if (i->second == reg)
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RegistersKilled.erase(i++);
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else
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++i;
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}
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return true;
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}
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/// removeVirtualRegistersDead - Remove all of the specified dead
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/// registers from the live variable information.
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void removeVirtualRegistersDead(killed_iterator B, killed_iterator E) {
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for (killed_iterator I = B; I != E; ++I) // Remove VarInfo entries...
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getVarInfo(I->second).removeKill(I->first);
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RegistersDead.erase(B, E);
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}
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesAll();
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}
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virtual void releaseMemory() {
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VirtRegInfo.clear();
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RegistersKilled.clear();
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RegistersDead.clear();
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}
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/// getVarInfo - Return the VarInfo structure for the specified VIRTUAL
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/// register.
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VarInfo &getVarInfo(unsigned RegIdx);
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void MarkVirtRegAliveInBlock(VarInfo &VRInfo, MachineBasicBlock *BB);
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void HandleVirtRegUse(VarInfo &VRInfo, MachineBasicBlock *MBB,
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MachineInstr *MI);
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};
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} // End llvm namespace
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#endif
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