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llvm-mirror/test/CodeGen/X86/widen_conv-1.ll
Chris Lattner ad85635a93 now that generic vector types aren't selected onto MMX registers, these
tests don't need -disable-mmx.

llvm-svn: 122188
2010-12-19 20:12:58 +00:00

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335 B
LLVM

; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s
; CHECK: pshufd
; CHECK: paddd
; truncate v2i64 to v2i32
define void @convert(<2 x i32>* %dst.addr, <2 x i64> %src) nounwind {
entry:
%val = trunc <2 x i64> %src to <2 x i32>
%add = add <2 x i32> %val, < i32 1, i32 1 >
store <2 x i32> %add, <2 x i32>* %dst.addr
ret void
}