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Generally, the ISEL is expanded into if-then-else sequence, in some cases (like when the destination register is the same with the true or false value register), it may just be expanded into just the if or else sequence. llvm-svn: 292154
45 lines
1.6 KiB
LLVM
45 lines
1.6 KiB
LLVM
; RUN: llc -verify-machineinstrs -mcpu=pwr8 < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr8 -ppc-gen-isel=false < %s | FileCheck --check-prefix=CHECK-NO-ISEL %s
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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; Function Attrs: nounwind
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define void @foo(i32* nocapture %r1, i32* nocapture %r2, i32* nocapture %r3, i32* nocapture %r4, i32 signext %a, i32 signext %b, i32 signext %c, i32 signext %d) #0 {
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entry:
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%tobool = icmp ne i32 %a, 0
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%cond = select i1 %tobool, i32 %b, i32 %c
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store i32 %cond, i32* %r1, align 4
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%cond5 = select i1 %tobool, i32 %b, i32 %d
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store i32 %cond5, i32* %r2, align 4
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%add = add nsw i32 %b, 1
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%sub = add nsw i32 %d, -2
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%cond10 = select i1 %tobool, i32 %add, i32 %sub
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store i32 %cond10, i32* %r3, align 4
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%add13 = add nsw i32 %b, 3
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%sub15 = add nsw i32 %d, -5
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%cond17 = select i1 %tobool, i32 %add13, i32 %sub15
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store i32 %cond17, i32* %r4, align 4
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ret void
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}
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; Make sure that we don't schedule all of the isels together, they should be
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; intermixed with the adds because each isel starts a new dispatch group.
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; CHECK-LABEL: @foo
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; CHECK-NO-ISEL-LABEL: @foo
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; CHECK: isel
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; CHECK-NO-ISEL: bc 12, 2, [[TRUE:.LBB[0-9]+]]
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; CHECK-NO-ISEL: ori 7, 12, 0
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; CHECK-NO-ISEL-NEXT: b [[SUCCESSOR:.LBB[0-9]+]]
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; CHECK-NO-ISEL: [[TRUE]]
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; CHECK-NO-ISEL-NEXT: addi 7, 11, 0
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; CHECK: addi
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; CHECK: isel
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; CHECK-NO-ISEL: bc 12, 2, [[TRUE:.LBB[0-9]+]]
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; CHECK-NO-ISEL: ori 10, 11, 0
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; CHECK-NO-ISEL-NEXT: b [[SUCCESSOR:.LBB[0-9]+]]
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; CHECK-NO-ISEL: [[TRUE]]
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; CHECK-NO-ISEL-NEXT: addi 10, 12, 0
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; CHECK: blr
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attributes #0 = { nounwind }
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