1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-25 12:12:47 +01:00
llvm-mirror/lib/CodeGen/SelectionDAG
Dale Johannesen 42c91e9024 Fix PR 7191. I have been unable to create a .ll file that fails, sorry.
(oye, a word which should be better known to people writing tree
traversals, means grandchild.)

llvm-svn: 104619
2010-05-25 17:50:03 +00:00
..
CallingConvLower.cpp
CMakeLists.txt Create a new TargetSelectionDAGInfo class. This will eventually acquire 2010-04-16 21:12:11 +00:00
DAGCombiner.cpp Fix PR 7191. I have been unable to create a .ll file that fails, sorry. 2010-05-25 17:50:03 +00:00
FastISel.cpp Fast ISel trivially coalesces away no-op casts, so check for this when 2010-05-14 22:53:18 +00:00
FunctionLoweringInfo.cpp Remove the code for special-casing byval for fast-isel. SelectionDAG 2010-05-01 02:44:23 +00:00
FunctionLoweringInfo.h Add comment. 2010-04-29 06:58:53 +00:00
InstrEmitter.cpp Continuously refine the register class of REG_SEQUENCE def with all the source registers and sub-register indices. 2010-05-18 20:07:47 +00:00
InstrEmitter.h Don't set kill flags for instructions which the scheduler has cloned. 2010-05-14 22:01:14 +00:00
LegalizeDAG.cpp When expanding a vector_shuffle, the element type may not be legal and may 2010-05-19 18:48:32 +00:00
LegalizeFloatTypes.cpp More 80 violations. 2010-04-15 01:25:27 +00:00
LegalizeIntegerTypes.cpp Fix uint64->{float, double} conversion to do rounding correctly in 32-bit. 2010-05-15 18:51:12 +00:00
LegalizeTypes.cpp 80 col violations. 2010-04-15 01:01:55 +00:00
LegalizeTypes.h I got tired of VISIBILITY_HIDDEN colliding with the gcc enum. Rename it 2010-05-11 20:16:09 +00:00
LegalizeTypesGeneric.cpp More 80 violations. 2010-04-15 01:25:27 +00:00
LegalizeVectorOps.cpp Use const qualifiers with TargetLowering. This eliminates several 2010-04-17 15:26:15 +00:00
LegalizeVectorTypes.cpp More 80 violations. 2010-04-15 01:25:27 +00:00
Makefile
ScheduleDAGFast.cpp
ScheduleDAGList.cpp
ScheduleDAGRRList.cpp Rename -pre-RA-sched=hybrid to -pre-RA-sched=list-hybrid. 2010-05-21 00:42:32 +00:00
ScheduleDAGSDNodes.cpp Allow targets more controls on what nodes are scheduled by reg pressure, what for latency in hybrid mode. 2010-05-20 23:26:43 +00:00
ScheduleDAGSDNodes.h Allow targets more controls on what nodes are scheduled by reg pressure, what for latency in hybrid mode. 2010-05-20 23:26:43 +00:00
SDNodeDbgValue.h Add const qualifiers to CodeGen's use of LLVM IR constructs. 2010-04-15 01:51:59 +00:00
SDNodeOrdering.h
SelectionDAG.cpp Improve assertion messages. 2010-05-15 18:38:02 +00:00
SelectionDAGBuilder.cpp Implement eh.sjlj.longjmp for ARM. Clean up the intrinsic a bit. 2010-05-22 01:06:18 +00:00
SelectionDAGBuilder.h Don't pass SDValues by non-const reference unless they may be 2010-05-01 00:33:16 +00:00
SelectionDAGISel.cpp Add a hybrid bottom up scheduler that reduce register usage while avoiding 2010-05-20 06:13:19 +00:00
SelectionDAGPrinter.cpp
TargetLowering.cpp Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMachine.h and put it in its own namespace. 2010-05-19 20:19:50 +00:00
TargetSelectionDAGInfo.cpp Implement a bunch more TargetSelectionDAGInfo infrastructure. 2010-05-11 17:31:57 +00:00