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e00b6e9f42
Currently only for broadcasts with input and output of the same width. Differential Revision: https://reviews.llvm.org/D27811 llvm-svn: 291122
168 lines
7.8 KiB
LLVM
168 lines
7.8 KiB
LLVM
; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+sse2 | FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=SSE2
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; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+ssse3 | FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=SSSE3
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; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+sse4.2 | FileCheck %s -check-prefix=CHECK -check-prefix=SSE -check-prefix=SSE42
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; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX1
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; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s -check-prefix=CHECK -check-prefix=AVX -check-prefix=AVX2
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; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512F
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; RUN: opt < %s -cost-model -analyze -mtriple=x86_64-unknown-linux-gnu -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=CHECK --check-prefix=AVX512 --check-prefix=AVX512BW
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;
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; Verify the cost model for broadcast shuffles.
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;
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; CHECK-LABEL: 'test_vXf64'
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define void @test_vXf64(<2 x double> %src128, <4 x double> %src256, <8 x double> %src512) {
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; SSE: cost of 1 {{.*}} %V128 = shufflevector
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; AVX: cost of 1 {{.*}} %V128 = shufflevector
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; AVX512: cost of 1 {{.*}} %V128 = shufflevector
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%V128 = shufflevector <2 x double> %src128, <2 x double> undef, <2 x i32> zeroinitializer
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; SSE: cost of 1 {{.*}} %V256 = shufflevector
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; AVX1: cost of 2 {{.*}} %V256 = shufflevector
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; AVX2: cost of 1 {{.*}} %V256 = shufflevector
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; AVX512: cost of 1 {{.*}} %V256 = shufflevector
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%V256 = shufflevector <4 x double> %src256, <4 x double> undef, <4 x i32> zeroinitializer
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; SSE: cost of 1 {{.*}} %V512 = shufflevector
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; AVX1: cost of 2 {{.*}} %V512 = shufflevector
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; AVX2: cost of 1 {{.*}} %V512 = shufflevector
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; AVX512: cost of 1 {{.*}} %V512 = shufflevector
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%V512 = shufflevector <8 x double> %src512, <8 x double> undef, <8 x i32> zeroinitializer
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ret void
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}
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; CHECK-LABEL: 'test_vXi64'
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define void @test_vXi64(<2 x i64> %src128, <4 x i64> %src256, <8 x i64> %src512) {
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; SSE: cost of 1 {{.*}} %V128 = shufflevector
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; AVX: cost of 1 {{.*}} %V128 = shufflevector
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; AVX512: cost of 1 {{.*}} %V128 = shufflevector
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%V128 = shufflevector <2 x i64> %src128, <2 x i64> undef, <2 x i32> zeroinitializer
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; SSE: cost of 1 {{.*}} %V256 = shufflevector
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; AVX1: cost of 2 {{.*}} %V256 = shufflevector
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; AVX2: cost of 1 {{.*}} %V256 = shufflevector
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; AVX512: cost of 1 {{.*}} %V256 = shufflevector
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%V256 = shufflevector <4 x i64> %src256, <4 x i64> undef, <4 x i32> zeroinitializer
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; SSE: cost of 1 {{.*}} %V512 = shufflevector
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; AVX1: cost of 2 {{.*}} %V512 = shufflevector
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; AVX2: cost of 1 {{.*}} %V512 = shufflevector
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; AVX512: cost of 1 {{.*}} %V512 = shufflevector
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%V512 = shufflevector <8 x i64> %src512, <8 x i64> undef, <8 x i32> zeroinitializer
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ret void
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}
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; CHECK-LABEL: 'test_vXf32'
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define void @test_vXf32(<2 x float> %src64, <4 x float> %src128, <8 x float> %src256, <16 x float> %src512) {
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; SSE: cost of 1 {{.*}} %V64 = shufflevector
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; AVX: cost of 1 {{.*}} %V64 = shufflevector
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; AVX512: cost of 1 {{.*}} %V64 = shufflevector
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%V64 = shufflevector <2 x float> %src64, <2 x float> undef, <2 x i32> zeroinitializer
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; SSE: cost of 1 {{.*}} %V128 = shufflevector
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; AVX: cost of 1 {{.*}} %V128 = shufflevector
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; AVX512: cost of 1 {{.*}} %V128 = shufflevector
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%V128 = shufflevector <4 x float> %src128, <4 x float> undef, <4 x i32> zeroinitializer
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; SSE: cost of 1 {{.*}} %V256 = shufflevector
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; AVX1: cost of 2 {{.*}} %V256 = shufflevector
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; AVX2: cost of 1 {{.*}} %V256 = shufflevector
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; AVX512: cost of 1 {{.*}} %V256 = shufflevector
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%V256 = shufflevector <8 x float> %src256, <8 x float> undef, <8 x i32> zeroinitializer
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; SSE: cost of 1 {{.*}} %V512 = shufflevector
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; AVX1: cost of 2 {{.*}} %V512 = shufflevector
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; AVX2: cost of 1 {{.*}} %V512 = shufflevector
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; AVX512: cost of 1 {{.*}} %V512 = shufflevector
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%V512 = shufflevector <16 x float> %src512, <16 x float> undef, <16 x i32> zeroinitializer
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ret void
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}
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; CHECK-LABEL: 'test_vXi32'
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define void @test_vXi32(<2 x i32> %src64, <4 x i32> %src128, <8 x i32> %src256, <16 x i32> %src512) {
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; SSE: cost of 1 {{.*}} %V64 = shufflevector
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; AVX: cost of 1 {{.*}} %V64 = shufflevector
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; AVX512: cost of 1 {{.*}} %V64 = shufflevector
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%V64 = shufflevector <2 x i32> %src64, <2 x i32> undef, <2 x i32> zeroinitializer
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; SSE: cost of 1 {{.*}} %V128 = shufflevector
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; AVX: cost of 1 {{.*}} %V128 = shufflevector
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; AVX512: cost of 1 {{.*}} %V128 = shufflevector
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%V128 = shufflevector <4 x i32> %src128, <4 x i32> undef, <4 x i32> zeroinitializer
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; SSE: cost of 1 {{.*}} %V256 = shufflevector
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; AVX1: cost of 2 {{.*}} %V256 = shufflevector
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; AVX2: cost of 1 {{.*}} %V256 = shufflevector
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; AVX512: cost of 1 {{.*}} %V256 = shufflevector
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%V256 = shufflevector <8 x i32> %src256, <8 x i32> undef, <8 x i32> zeroinitializer
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; SSE: cost of 1 {{.*}} %V512 = shufflevector
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; AVX1: cost of 2 {{.*}} %V512 = shufflevector
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; AVX2: cost of 1 {{.*}} %V512 = shufflevector
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; AVX512: cost of 1 {{.*}} %V512 = shufflevector
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%V512 = shufflevector <16 x i32> %src512, <16 x i32> undef, <16 x i32> zeroinitializer
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ret void
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}
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; CHECK-LABEL: 'test_vXi16'
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define void @test_vXi16(<8 x i16> %src128, <16 x i16> %src256, <32 x i16> %src512) {
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; SSE2: cost of 2 {{.*}} %V128 = shufflevector
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; SSSE3: cost of 1 {{.*}} %V128 = shufflevector
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; SSE42: cost of 1 {{.*}} %V128 = shufflevector
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; AVX: cost of 1 {{.*}} %V128 = shufflevector
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; AVX512: cost of 1 {{.*}} %V128 = shufflevector
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%V128 = shufflevector <8 x i16> %src128, <8 x i16> undef, <8 x i32> zeroinitializer
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; SSE2: cost of 2 {{.*}} %V256 = shufflevector
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; SSSE3: cost of 1 {{.*}} %V256 = shufflevector
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; SSE42: cost of 1 {{.*}} %V256 = shufflevector
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; AVX1: cost of 3 {{.*}} %V256 = shufflevector
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; AVX2: cost of 1 {{.*}} %V256 = shufflevector
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; AVX512: cost of 1 {{.*}} %V256 = shufflevector
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%V256 = shufflevector <16 x i16> %src256, <16 x i16> undef, <16 x i32> zeroinitializer
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; SSE2: cost of 2 {{.*}} %V512 = shufflevector
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; SSSE3: cost of 1 {{.*}} %V512 = shufflevector
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; SSE42: cost of 1 {{.*}} %V512 = shufflevector
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; AVX1: cost of 3 {{.*}} %V512 = shufflevector
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; AVX2: cost of 1 {{.*}} %V512 = shufflevector
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; AVX512F: cost of 1 {{.*}} %V512 = shufflevector
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; AVX512BW: cost of 1 {{.*}} %V512 = shufflevector
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%V512 = shufflevector <32 x i16> %src512, <32 x i16> undef, <32 x i32> zeroinitializer
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ret void
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}
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; CHECK-LABEL: 'test_vXi8'
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define void @test_vXi8(<16 x i8> %src128, <32 x i8> %src256, <64 x i8> %src512) {
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; SSE2: cost of 3 {{.*}} %V128 = shufflevector
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; SSSE3: cost of 1 {{.*}} %V128 = shufflevector
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; SSE42: cost of 1 {{.*}} %V128 = shufflevector
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; AVX: cost of 1 {{.*}} %V128 = shufflevector
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; AVX512: cost of 1 {{.*}} %V128 = shufflevector
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%V128 = shufflevector <16 x i8> %src128, <16 x i8> undef, <16 x i32> zeroinitializer
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; SSE2: cost of 3 {{.*}} %V256 = shufflevector
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; SSSE3: cost of 1 {{.*}} %V256 = shufflevector
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; SSE42: cost of 1 {{.*}} %V256 = shufflevector
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; AVX1: cost of 2 {{.*}} %V256 = shufflevector
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; AVX2: cost of 1 {{.*}} %V256 = shufflevector
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; AVX512: cost of 1 {{.*}} %V256 = shufflevector
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%V256 = shufflevector <32 x i8> %src256, <32 x i8> undef, <32 x i32> zeroinitializer
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; SSE2: cost of 3 {{.*}} %V512 = shufflevector
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; SSSE3: cost of 1 {{.*}} %V512 = shufflevector
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; SSE42: cost of 1 {{.*}} %V512 = shufflevector
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; AVX1: cost of 2 {{.*}} %V512 = shufflevector
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; AVX2: cost of 1 {{.*}} %V512 = shufflevector
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; AVX512F: cost of 1 {{.*}} %V512 = shufflevector
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; AVX512BW: cost of 1 {{.*}} %V512 = shufflevector
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%V512 = shufflevector <64 x i8> %src512, <64 x i8> undef, <64 x i32> zeroinitializer
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ret void
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}
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