Matt Arsenault 42ea6294ae AMDGPU: Fix crash with unreachable terminators. ... If a block has no successors because it ends in unreachable, this was accessing an invalid iterator. Also stop counting instructions that don't emit any real instructions. llvm-svn: 268119		2016-04-29 21:52:13 +00:00
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AArch64	[AArch64] Set correct successors in CMPXCHG pseudo expansion.	2016-04-27 20:33:02 +00:00
AMDGPU	AMDGPU: Fix crash with unreachable terminators.	2016-04-29 21:52:13 +00:00
ARM	[ARM] Set correct successors in CMPXCHG pseudo expansion.	2016-04-27 20:32:54 +00:00
BPF
CPP
Generic
Hexagon	[Hexagon] Optimize addressing modes for load/store	2016-04-29 15:49:13 +00:00
Inputs
Lanai
Mips	[mips][FastISel] A store is not a load.	2016-04-29 16:07:47 +00:00
MIR	tests: tweak MIR for ARM tests to correct MI issues	2016-04-26 17:54:21 +00:00
MSP430
NVPTX
PowerPC	[PPC] Enable shuffling of VSX vectors	2016-04-29 17:00:54 +00:00
SPARC	[SPARC] [SSP] Add support for LOAD_STACK_GUARD.	2016-04-26 10:37:14 +00:00
SystemZ	DAGCombiner: Reduce truncated shl width	2016-04-29 19:53:16 +00:00
Thumb
Thumb2
WebAssembly
WinEH
X86	Differential Revision: http://reviews.llvm.org/D19733	2016-04-29 21:19:16 +00:00
XCore