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When SIFixSGPRCopies attempts to fix an illegal copy from vector to scalar register it calls moveToVALU(). A copy from an agpr to sgpr becomes a copy from agpr to agpr, which may result in the illegal register class at a use of this copy. Solution is to copy it always into a vgpr. This may result in a subsequent copy into an agpr if that is what really needed, however should not happen too often and likely will be folded later. The opposite situation may not happen because an sgpr is always illegal where agpr is legal, so such user instructions may not exist. Differential Revision: https://reviews.llvm.org/D68358 llvm-svn: 373544
66 lines
2.8 KiB
LLVM
66 lines
2.8 KiB
LLVM
; RUN: not llc -march=amdgcn < %s 2>&1 | FileCheck -check-prefix=ERR %s
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; RUN: not llc -march=amdgcn < %s 2>&1 | FileCheck -check-prefix=GCN %s
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; ERR: error: <unknown>:0:0: in function illegal_vgpr_to_sgpr_copy_i32 void (): illegal SGPR to VGPR copy
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; GCN: ; illegal copy v1 to s9
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define amdgpu_kernel void @illegal_vgpr_to_sgpr_copy_i32() #0 {
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%vgpr = call i32 asm sideeffect "; def $0", "=${v1}"()
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call void asm sideeffect "; use $0", "${s9}"(i32 %vgpr)
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ret void
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}
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; ERR: error: <unknown>:0:0: in function illegal_vgpr_to_sgpr_copy_v2i32 void (): illegal SGPR to VGPR copy
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; GCN: ; illegal copy v[0:1] to s[10:11]
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define amdgpu_kernel void @illegal_vgpr_to_sgpr_copy_v2i32() #0 {
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%vgpr = call <2 x i32> asm sideeffect "; def $0", "=${v[0:1]}"()
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call void asm sideeffect "; use $0", "${s[10:11]}"(<2 x i32> %vgpr)
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ret void
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}
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; ERR: error: <unknown>:0:0: in function illegal_vgpr_to_sgpr_copy_v4i32 void (): illegal SGPR to VGPR copy
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; GCN: ; illegal copy v[0:3] to s[8:11]
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define amdgpu_kernel void @illegal_vgpr_to_sgpr_copy_v4i32() #0 {
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%vgpr = call <4 x i32> asm sideeffect "; def $0", "=${v[0:3]}"()
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call void asm sideeffect "; use $0", "${s[8:11]}"(<4 x i32> %vgpr)
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ret void
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}
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; ERR: error: <unknown>:0:0: in function illegal_vgpr_to_sgpr_copy_v8i32 void (): illegal SGPR to VGPR copy
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; GCN: ; illegal copy v[0:7] to s[8:15]
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define amdgpu_kernel void @illegal_vgpr_to_sgpr_copy_v8i32() #0 {
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%vgpr = call <8 x i32> asm sideeffect "; def $0", "=${v[0:7]}"()
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call void asm sideeffect "; use $0", "${s[8:15]}"(<8 x i32> %vgpr)
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ret void
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}
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; ERR error: <unknown>:0:0: in function illegal_vgpr_to_sgpr_copy_v16i32 void (): illegal SGPR to VGPR copy
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; GCN: ; illegal copy v[0:15] to s[16:31]
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define amdgpu_kernel void @illegal_vgpr_to_sgpr_copy_v16i32() #0 {
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%vgpr = call <16 x i32> asm sideeffect "; def $0", "=${v[0:15]}"()
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call void asm sideeffect "; use $0", "${s[16:31]}"(<16 x i32> %vgpr)
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ret void
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}
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; ERR: error: <unknown>:0:0: in function illegal_agpr_to_sgpr_copy_i32 void (): illegal SGPR to VGPR copy
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; GCN: v_accvgpr_read_b32 [[COPY1:v[0-9]+]], a1
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; GCN: ; illegal copy [[COPY1]] to s9
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define amdgpu_kernel void @illegal_agpr_to_sgpr_copy_i32() #1 {
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%agpr = call i32 asm sideeffect "; def $0", "=${a1}"()
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call void asm sideeffect "; use $0", "${s9}"(i32 %agpr)
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ret void
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}
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; ERR: error: <unknown>:0:0: in function illegal_agpr_to_sgpr_copy_v2i32 void (): illegal SGPR to VGPR copy
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; GCN-DAG: v_accvgpr_read_b32 v[[COPY1L:[0-9]+]], a0
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; GCN-DAG: v_accvgpr_read_b32 v[[COPY1H:[0-9]+]], a1
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; GCN: ; illegal copy v{{\[}}[[COPY1L]]:[[COPY1H]]] to s[10:11]
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define amdgpu_kernel void @illegal_agpr_to_sgpr_copy_v2i32() #1 {
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%vgpr = call <2 x i32> asm sideeffect "; def $0", "=${a[0:1]}"()
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call void asm sideeffect "; use $0", "${s[10:11]}"(<2 x i32> %vgpr)
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ret void
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}
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attributes #0 = { nounwind }
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attributes #1 = { nounwind "target-cpu"="gfx908" }
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