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https://github.com/RPCS3/llvm-mirror.git
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cc445a07d6
Currently we only rely on the induction increment to come before the condition to ensure the required instructions get moved to the new latch. This patch duplicates and moves the required instructions to the newly created latch. We move the condition to the end of the new block, then process its operands. We stop at operands that are defined outside the loop, or are the induction PHI. We duplicate the instructions and update the uses in the moved instructions, to ensure other users remain intact. See the added test2 for such an example. Reviewers: efriedma, mcrosier Reviewed By: efriedma Differential Revision: https://reviews.llvm.org/D67367 llvm-svn: 371595
141 lines
6.0 KiB
LLVM
141 lines
6.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -loop-interchange -verify-loop-lcssa -verify-dom-info -S %s | FileCheck %s
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@b = external dso_local global [5 x i32], align 16
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define void @test1() {
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; CHECK-LABEL: @test1(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[FOR_BODY2_PREHEADER:%.*]]
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; CHECK: for.body.preheader:
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[INC41:%.*]] = phi i32 [ [[INC4:%.*]], [[FOR_INC3:%.*]] ], [ undef, [[FOR_BODY_PREHEADER:%.*]] ]
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; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[INC41]] to i64
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [5 x i32], [5 x i32]* @b, i64 0, i64 [[IDXPROM]]
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; CHECK-NEXT: br label [[FOR_BODY2_SPLIT:%.*]]
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; CHECK: for.body2.preheader:
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; CHECK-NEXT: br label [[FOR_BODY2:%.*]]
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; CHECK: for.body2:
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; CHECK-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[TMP1:%.*]], [[FOR_INC_SPLIT:%.*]] ], [ 1, [[FOR_BODY2_PREHEADER]] ]
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; CHECK-NEXT: br label [[FOR_BODY_PREHEADER]]
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; CHECK: for.body2.split:
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; CHECK-NEXT: br label [[FOR_INC:%.*]]
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; CHECK: for.inc:
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
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; CHECK-NEXT: store i32 undef, i32* [[ARRAYIDX]], align 4
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[LSR_IV]], 4
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; CHECK-NEXT: [[LSR_IV_NEXT:%.*]] = add nuw nsw i32 [[LSR_IV]], 1
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; CHECK-NEXT: br label [[FOR_COND1_FOR_END_CRIT_EDGE:%.*]]
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; CHECK: for.inc.split:
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; CHECK-NEXT: [[TMP1]] = add nuw nsw i32 [[LSR_IV]], 1
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; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[LSR_IV]], 4
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; CHECK-NEXT: br i1 [[TMP2]], label [[FOR_BODY2]], label [[FOR_COND_FOR_END5_CRIT_EDGE:%.*]]
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; CHECK: for.cond1.for.end_crit_edge:
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; CHECK-NEXT: br label [[FOR_INC3]]
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; CHECK: for.inc3:
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; CHECK-NEXT: [[INC4]] = add nsw i32 [[INC41]], 1
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; CHECK-NEXT: br i1 false, label [[FOR_BODY]], label [[FOR_INC_SPLIT]]
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; CHECK: for.cond.for.end5_crit_edge:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %for.body
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for.body: ; preds = %for.inc3, %entry
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%inc41 = phi i32 [ %inc4, %for.inc3 ], [ undef, %entry ]
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br label %for.body2
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for.body2: ; preds = %for.inc, %for.body
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%lsr.iv = phi i32 [ %lsr.iv.next, %for.inc ], [ 1, %for.body ]
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br label %for.inc
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for.inc: ; preds = %for.body2
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%idxprom = sext i32 %inc41 to i64
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%arrayidx = getelementptr inbounds [5 x i32], [5 x i32]* @b, i64 0, i64 %idxprom
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%0 = load i32, i32* %arrayidx, align 4
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store i32 undef, i32* %arrayidx, align 4
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%cmp = icmp slt i32 %lsr.iv, 4
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%lsr.iv.next = add nuw nsw i32 %lsr.iv, 1
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br i1 %cmp, label %for.body2, label %for.cond1.for.end_crit_edge
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for.cond1.for.end_crit_edge: ; preds = %for.inc
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br label %for.inc3
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for.inc3: ; preds = %for.cond1.for.end_crit_edge
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%inc4 = add nsw i32 %inc41, 1
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br i1 undef, label %for.body, label %for.cond.for.end5_crit_edge
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for.cond.for.end5_crit_edge: ; preds = %for.inc3
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ret void
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}
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define void @test2() {
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; CHECK-LABEL: @test2(
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; CHECK-NEXT: entry:
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; CHECK-NEXT: br label [[FOR_BODY2_PREHEADER:%.*]]
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; CHECK: for.body.preheader:
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; CHECK-NEXT: br label [[FOR_BODY:%.*]]
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; CHECK: for.body:
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; CHECK-NEXT: [[INC41:%.*]] = phi i32 [ [[INC4:%.*]], [[FOR_INC3:%.*]] ], [ undef, [[FOR_BODY_PREHEADER:%.*]] ]
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; CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[INC41]] to i64
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; CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [5 x i32], [5 x i32]* @b, i64 0, i64 [[IDXPROM]]
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; CHECK-NEXT: br label [[FOR_BODY2_SPLIT:%.*]]
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; CHECK: for.body2.preheader:
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; CHECK-NEXT: br label [[FOR_BODY2:%.*]]
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; CHECK: for.body2:
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; CHECK-NEXT: [[LSR_IV:%.*]] = phi i32 [ [[TMP1:%.*]], [[FOR_INC_SPLIT:%.*]] ], [ 1, [[FOR_BODY2_PREHEADER]] ]
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; CHECK-NEXT: br label [[FOR_BODY_PREHEADER]]
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; CHECK: for.body2.split:
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; CHECK-NEXT: br label [[FOR_INC:%.*]]
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; CHECK: for.inc:
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; CHECK-NEXT: [[TMP0:%.*]] = load i32, i32* [[ARRAYIDX]], align 4
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; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[LSR_IV]], 4
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; CHECK-NEXT: [[CMP_ZEXT:%.*]] = zext i1 [[CMP]] to i32
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; CHECK-NEXT: store i32 [[CMP_ZEXT]], i32* [[ARRAYIDX]], align 4
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; CHECK-NEXT: [[LSR_IV_NEXT:%.*]] = add nuw nsw i32 [[LSR_IV]], 1
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; CHECK-NEXT: br label [[FOR_COND1_FOR_END_CRIT_EDGE:%.*]]
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; CHECK: for.inc.split:
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; CHECK-NEXT: [[TMP1]] = add nuw nsw i32 [[LSR_IV]], 1
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; CHECK-NEXT: [[TMP2:%.*]] = icmp slt i32 [[LSR_IV]], 4
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; CHECK-NEXT: br i1 [[TMP2]], label [[FOR_BODY2]], label [[FOR_COND_FOR_END5_CRIT_EDGE:%.*]]
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; CHECK: for.cond1.for.end_crit_edge:
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; CHECK-NEXT: br label [[FOR_INC3]]
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; CHECK: for.inc3:
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; CHECK-NEXT: [[INC4]] = add nsw i32 [[INC41]], 1
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; CHECK-NEXT: br i1 false, label [[FOR_BODY]], label [[FOR_INC_SPLIT]]
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; CHECK: for.cond.for.end5_crit_edge:
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; CHECK-NEXT: ret void
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;
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entry:
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br label %for.body
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for.body: ; preds = %for.inc3, %entry
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%inc41 = phi i32 [ %inc4, %for.inc3 ], [ undef, %entry ]
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br label %for.body2
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for.body2: ; preds = %for.inc, %for.body
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%lsr.iv = phi i32 [ %lsr.iv.next, %for.inc ], [ 1, %for.body ]
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br label %for.inc
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for.inc: ; preds = %for.body2
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%idxprom = sext i32 %inc41 to i64
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%arrayidx = getelementptr inbounds [5 x i32], [5 x i32]* @b, i64 0, i64 %idxprom
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%0 = load i32, i32* %arrayidx, align 4
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%cmp = icmp slt i32 %lsr.iv, 4
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%cmp.zext = zext i1 %cmp to i32
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store i32 %cmp.zext, i32* %arrayidx, align 4
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%lsr.iv.next = add nuw nsw i32 %lsr.iv, 1
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br i1 %cmp, label %for.body2, label %for.cond1.for.end_crit_edge
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for.cond1.for.end_crit_edge: ; preds = %for.inc
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br label %for.inc3
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for.inc3: ; preds = %for.cond1.for.end_crit_edge
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%inc4 = add nsw i32 %inc41, 1
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br i1 undef, label %for.body, label %for.cond.for.end5_crit_edge
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for.cond.for.end5_crit_edge: ; preds = %for.inc3
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ret void
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}
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