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llvm-mirror/test/CodeGen
Sirish Pande 253d16b1b0 Support for target dependent Hexagon VLIW packetizer.
This patch creates and optimizes packets as per Hexagon ISA rules.

llvm-svn: 156109
2012-05-03 21:52:53 +00:00
..
ARM Teach DAGCombine the same multiply-by-1.0 folding trick when doing FMAs, just like it now knows for FMULs. 2012-05-02 22:17:40 +00:00
CellSPU Flip the new block-placement pass to be on by default. 2012-04-16 13:49:17 +00:00
CPP Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
Generic Move to X86 directory because this fails on non-X86 platforms. 2012-04-16 16:38:48 +00:00
Hexagon Support for target dependent Hexagon VLIW packetizer. 2012-05-03 21:52:53 +00:00
MBlaze Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
Mips Do not use $gp as a dedicated global register if the target ABI is not O32. 2012-04-25 01:24:52 +00:00
MSP430 Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
PowerPC Remove dead SD nodes after the combining pass. Fixes PR12201. 2012-04-16 03:33:22 +00:00
PTX Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu 2012-03-25 09:02:19 +00:00
SPARC Regression test for PR2960. 2012-05-01 11:11:34 +00:00
Thumb Make test less fragile. 2012-04-27 20:48:18 +00:00
Thumb2 If triple is armv7 / thumbv7 and a CPU is specified, do not automatically assume 2012-04-26 01:13:36 +00:00
X86 Fix 256-bit vpshuflw and vpshufhw immediate encoding to handle undefs in the lower half correctly. Missed in r155982. 2012-05-03 07:12:59 +00:00
XCore Flip the new block-placement pass to be on by default. 2012-04-16 13:49:17 +00:00