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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-23 19:23:23 +01:00
llvm-mirror/test/Bitcode
Joel Jones 4ce75efda5 More replacing of target-dependent intrinsics with target-indepdent
intrinsics.  The second instruction(s) to be handled are the vector versions 
of count set bits (ctpop).

The changes here are to clang so that it generates a target independent 
vector ctpop when it sees an ARM dependent vector bits set count.  The changes 
in llvm are to match the target independent vector ctpop and in 
VMCore/AutoUpgrade.cpp to update any existing bc files containing ARM 
dependent vector pop counts with target-independent ctpops.  There are also 
changes to an existing test case in llvm for ARM vector count instructions and 
to a test for the bitcode upgrade.

<rdar://problem/11892519>

There is deliberately no test for the change to clang, as so far as I know, no
consensus has been reached regarding how to test neon instructions in clang;
q.v. <rdar://problem/8762292>

llvm-svn: 160410
2012-07-18 00:02:16 +00:00
..
2006-12-11-Cast-ConstExpr.ll
2009-06-11-FirstClassAggregateConstant.ll
2012-05-07-SwitchInstRangesSupport.ll Fixed diff comparison. 2012-07-11 21:02:57 +00:00
arm32_neon_vcnt_upgrade.ll More replacing of target-dependent intrinsics with target-indepdent 2012-07-18 00:02:16 +00:00
attributes.ll
blockaddress.ll
extractelement.ll
flags.ll
lit.local.cfg
metadata-2.ll
metadata.ll
null-type.ll Make tests which first provide a negative assertion via 'not', then 2012-07-02 12:23:19 +00:00
null-type.ll.bc
ptest-new.ll Add AutoUpgrade support for the SSE4 ptest intrinsics. 2012-06-10 18:42:51 +00:00
ptest-old.ll Add AutoUpgrade support for the SSE4 ptest intrinsics. 2012-06-10 18:42:51 +00:00
shuffle.ll
ssse3_palignr.ll