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29 lines
862 B
LLVM
29 lines
862 B
LLVM
; RUN: llc -march=hexagon -O0 < %s | FileCheck %s
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; CHECK: r{{[0-9]*}}:{{[0-9]*}} = rol(r{{[0-9]*}}:{{[0-9]*}},#4)
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target triple = "hexagon"
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@g0 = private unnamed_addr constant [33 x i8] c"%llx : Q6_P_rol_PI(LONG_MIN,0)\0A\00", align 1
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; Function Attrs: nounwind
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declare i32 @f0(i8*, ...) #0
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; Function Attrs: nounwind
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define i32 @f1() #0 {
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b0:
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%v0 = alloca i32, align 4
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%v1 = alloca i32, align 4
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store i32 0, i32* %v0
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store i32 0, i32* %v1, align 4
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%v2 = call i64 @llvm.hexagon.S6.rol.i.p(i64 483648, i32 4)
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%v3 = call i32 (i8*, ...) @f0(i8* getelementptr inbounds ([33 x i8], [33 x i8]* @g0, i32 0, i32 0), i64 %v2) #2
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ret i32 0
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}
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; Function Attrs: nounwind readnone
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declare i64 @llvm.hexagon.S6.rol.i.p(i64, i32) #1
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attributes #0 = { nounwind "target-cpu"="hexagonv60" }
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attributes #1 = { nounwind readnone }
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attributes #2 = { nounwind }
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