mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-23 19:23:23 +01:00
b9ecf8a3ee
This commit changes the interface of the vld[1234], vld[234]lane, and vst[1234], vst[234]lane ARM neon intrinsics and associates an address space with the pointer that these intrinsics take. This changes, e.g., <2 x i32> @llvm.arm.neon.vld1.v2i32(i8*, i32) to <2 x i32> @llvm.arm.neon.vld1.v2i32.p0i8(i8*, i32) This change ensures that address spaces are fully taken into account in the ARM target during lowering of interleaved loads and stores. Differential Revision: http://reviews.llvm.org/D12985 llvm-svn: 248887
18 lines
549 B
LLVM
18 lines
549 B
LLVM
; RUN: llc < %s -mtriple=thumbv8 -mattr=+neon | FileCheck %s
|
|
; RUN: llc < %s -mtriple=thumbv7 -mattr=+neon -arm-restrict-it | FileCheck %s
|
|
|
|
;CHECK-LABEL: select_s_v_v:
|
|
;CHECK-NOT: it
|
|
;CHECK: bx
|
|
define <16 x i8> @select_s_v_v(i32 %avail, i8* %bar) {
|
|
entry:
|
|
%vld1 = call <16 x i8> @llvm.arm.neon.vld1.v16i8.p0i8(i8* %bar, i32 1)
|
|
%and = and i32 %avail, 1
|
|
%tobool = icmp eq i32 %and, 0
|
|
%vld1. = select i1 %tobool, <16 x i8> %vld1, <16 x i8> zeroinitializer
|
|
ret <16 x i8> %vld1.
|
|
}
|
|
|
|
declare <16 x i8> @llvm.arm.neon.vld1.v16i8.p0i8(i8* , i32 )
|
|
|