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7464e6c913
This patch moves the construction of the default backend from llvm-mca.cpp and into mca::Context. The Context class is responsible for holding ownership of the simulated hardware components. These components are subclasses of HardwareUnit. Right now the HardwareUnit is pretty bare-bones, but eventually we might want to add some common functionality across all hardware components, such as isReady() or something similar. I have a feeling this patch will probably need some updates, but it's a start. One thing I am not particularly fond of is the rather large interface for createDefaultPipeline. That convenience routine takes a rather large set of inputs from the llvm-mca driver, where many of those inputs are generated via command line options. One item I think we might want to change is the separating of ownership of hardware components (owned by the context) and the pipeline (which owns Stages). In short, a Pipeline owns Stages, a Context (currently) owns hardware. The Pipeline's Stages make use of the components, and thus there is a lifetime dependency generated. The components must outlive the pipeline. We could solve this by having the Context also own the Pipeline, and not return a unique_ptr<Pipeline>. Now that I think about it, I like that idea more. Differential Revision: https://reviews.llvm.org/D48691 llvm-svn: 336456
99 lines
3.5 KiB
C++
99 lines
3.5 KiB
C++
//===---------------------- RetireControlUnit.h -----------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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/// \file
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///
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/// This file simulates the hardware responsible for retiring instructions.
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_TOOLS_LLVM_MCA_RETIRE_CONTROL_UNIT_H
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#define LLVM_TOOLS_LLVM_MCA_RETIRE_CONTROL_UNIT_H
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#include "HardwareUnit.h"
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#include "Instruction.h"
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#include "llvm/MC/MCSchedule.h"
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#include <vector>
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namespace mca {
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/// This class tracks which instructions are in-flight (i.e., dispatched but not
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/// retired) in the OoO backend.
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//
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/// This class checks on every cycle if/which instructions can be retired.
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/// Instructions are retired in program order.
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/// In the event of an instruction being retired, the pipeline that owns
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/// this RetireControlUnit (RCU) gets notified.
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///
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/// On instruction retired, register updates are all architecturally
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/// committed, and any temporary registers originally allocated for the
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/// retired instruction are freed.
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struct RetireControlUnit : public HardwareUnit {
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// A RUToken is created by the RCU for every instruction dispatched to the
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// schedulers. These "tokens" are managed by the RCU in its token Queue.
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//
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// On every cycle ('cycleEvent'), the RCU iterates through the token queue
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// looking for any token with its 'Executed' flag set. If a token has that
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// flag set, then the instruction has reached the write-back stage and will
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// be retired by the RCU.
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//
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// 'NumSlots' represents the number of entries consumed by the instruction in
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// the reorder buffer. Those entries will become available again once the
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// instruction is retired.
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//
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// Note that the size of the reorder buffer is defined by the scheduling
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// model via field 'NumMicroOpBufferSize'.
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struct RUToken {
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InstRef IR;
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unsigned NumSlots; // Slots reserved to this instruction.
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bool Executed; // True if the instruction is past the WB stage.
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};
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private:
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unsigned NextAvailableSlotIdx;
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unsigned CurrentInstructionSlotIdx;
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unsigned AvailableSlots;
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unsigned MaxRetirePerCycle; // 0 means no limit.
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std::vector<RUToken> Queue;
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public:
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RetireControlUnit(const llvm::MCSchedModel &SM);
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bool isFull() const { return !AvailableSlots; }
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bool isEmpty() const { return AvailableSlots == Queue.size(); }
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bool isAvailable(unsigned Quantity = 1) const {
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// Some instructions may declare a number of uOps which exceeds the size
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// of the reorder buffer. To avoid problems, cap the amount of slots to
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// the size of the reorder buffer.
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Quantity = std::min(Quantity, static_cast<unsigned>(Queue.size()));
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return AvailableSlots >= Quantity;
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}
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unsigned getMaxRetirePerCycle() const { return MaxRetirePerCycle; }
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// Reserves a number of slots, and returns a new token.
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unsigned reserveSlot(const InstRef &IS, unsigned NumMicroOps);
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// Return the current token from the RCU's circular token queue.
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const RUToken &peekCurrentToken() const;
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// Advance the pointer to the next token in the circular token queue.
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void consumeCurrentToken();
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// Update the RCU token to represent the executed state.
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void onInstructionExecuted(unsigned TokenID);
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#ifndef NDEBUG
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void dump() const;
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#endif
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};
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} // namespace mca
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#endif // LLVM_TOOLS_LLVM_MCA_RETIRE_CONTROL_UNIT_H
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