..
AArch64
Update PEI's virtual-register-based scavenging to support multiple simultaneous mappings
2013-03-26 18:56:54 +00:00
ARM
Reorder the DIFile field in DILexicalBlock to become a prefix common with other DIScopes
2013-03-22 05:47:44 +00:00
CPP
test commit: remove blank line.
2013-03-14 05:43:59 +00:00
Generic
XFAIL some of the generic CodeGen tests for Hexagon.
2013-03-25 21:04:16 +00:00
Hexagon
Hexagon: Use multiclass for aslh, asrh, sxtb, sxth, zxtb and zxth.
2013-03-26 15:43:57 +00:00
Inputs
Remove unused field in DISubprogram
2013-03-21 20:28:52 +00:00
MBlaze
Remove unnecessary leading comment characters in lit-only file
2013-03-18 22:08:16 +00:00
Mips
Remove unnecessary leading comment characters in lit-only file
2013-03-18 22:08:16 +00:00
MSP430
Remove unnecessary leading comment characters in lit-only file
2013-03-18 22:08:16 +00:00
NVPTX
[NVPTX] Fix handling of vector arguments
2013-03-24 21:17:47 +00:00
PowerPC
Use multiple virtual registers in PPC CR spilling
2013-03-26 18:57:22 +00:00
R600
R600/SI: mark most intrinsics as readnone v2
2013-03-26 14:03:57 +00:00
SI
SPARC
Remove unnecessary leading comment characters in lit-only file
2013-03-18 22:08:16 +00:00
Thumb
Reorder the DIFile field in DILexicalBlock to become a prefix common with other DIScopes
2013-03-22 05:47:44 +00:00
Thumb2
SDAG: Handle scalarizing an extend of a <1 x iN> vector.
2013-03-07 05:47:54 +00:00
X86
Enable SandyBridgeModel for all modern Intel P6 descendants.
2013-03-26 22:19:12 +00:00
XCore
Remove unnecessary leading comment characters in lit-only file
2013-03-18 22:08:16 +00:00