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9cf21dc31e
Summary: The standard data emission directives (e.g. .short, .long) in the AIX assembler have the unintended consequence of aligning their output to the natural byte boundary. This cause problems because we aren't expecting behavior from the Data*bitsDirectives, so the final alignment of data isn't correct in some cases on AIX. This patch updated the Data*bitsDirectives to use .vbyte pseudo-ops instead to emit the data, since we will emit the .align directives as needed. We update the existing testcases and add a test for emission of struct data. Reviewers: hubert.reinterpretcast, Xiangling_L, jasonliu Reviewed By: hubert.reinterpretcast, jasonliu Subscribers: wuzish, nemanjai, hiraditya, kbarton, arphaman, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D80934
84 lines
3.1 KiB
LLVM
84 lines
3.1 KiB
LLVM
; This file tests the codegen of mergeable strings in AIX assembly only.
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; Once the codegen of mergeable strings for XCOFF object files is supported
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; the test in this file should be merged into aix-xcoff-data.ll with additional
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; tests for XCOFF object files.
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; RUN: llc -verify-machineinstrs -mcpu=pwr4 \
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; RUN: -mtriple powerpc-ibm-aix-xcoff < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr4 \
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; RUN: -mtriple powerpc64-ibm-aix-xcoff < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr4 -mtriple powerpc-ibm-aix-xcoff -filetype=obj -o %t.o < %s
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; RUN: llvm-objdump -D %t.o | FileCheck --check-prefix=CHECKOBJ %s
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@magic16 = private unnamed_addr constant [4 x i16] [i16 264, i16 272, i16 213, i16 0], align 2
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@magic32 = private unnamed_addr constant [4 x i32] [i32 464, i32 472, i32 413, i32 0], align 4
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@strA = private unnamed_addr constant [14 x i8] c"hello world!\0A\00", align 1
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@.str = private unnamed_addr constant [9 x i8] c"abcdefgh\00", align 1
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@p = global i8* getelementptr inbounds ([9 x i8], [9 x i8]* @.str, i32 0, i32 0), align 4
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; Function Attrs: noinline nounwind optnone
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define i8 @foo() #0 {
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entry:
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%0 = load i8*, i8** @p, align 4
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%1 = load i8, i8* %0, align 1
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ret i8 %1
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}
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; CHECK: .csect .rodata.str2.2[RO],2
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; CHECK-NEXT: .align 1
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; CHECK-NEXT: .Lmagic16:
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; CHECK-NEXT: .vbyte 2, 264 # 0x108
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; CHECK-NEXT: .vbyte 2, 272 # 0x110
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; CHECK-NEXT: .vbyte 2, 213 # 0xd5
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; CHECK-NEXT: .vbyte 2, 0 # 0x0
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; CHECK-NEXT: .csect .rodata.str4.4[RO],2
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; CHECK-NEXT: .align 2
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; CHECK-NEXT: .Lmagic32:
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; CHECK-NEXT: .vbyte 4, 464 # 0x1d0
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; CHECK-NEXT: .vbyte 4, 472 # 0x1d8
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; CHECK-NEXT: .vbyte 4, 413 # 0x19d
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; CHECK-NEXT: .vbyte 4, 0 # 0x0
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; CHECK-NEXT: .csect .rodata.str1.1[RO],2
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; CHECK-NEXT: .LstrA:
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; CHECK-NEXT: .byte 104
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; CHECK-NEXT: .byte 101
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; CHECK-NEXT: .byte 108
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; CHECK-NEXT: .byte 108
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; CHECK-NEXT: .byte 111
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; CHECK-NEXT: .byte 32
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; CHECK-NEXT: .byte 119
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; CHECK-NEXT: .byte 111
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; CHECK-NEXT: .byte 114
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; CHECK-NEXT: .byte 108
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; CHECK-NEXT: .byte 100
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; CHECK-NEXT: .byte 33
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; CHECK-NEXT: .byte 10
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; CHECK-NEXT: .byte 0
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; CHECK-NEXT: .L.str:
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; CHECK-NEXT: .byte 97
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; CHECK-NEXT: .byte 98
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; CHECK-NEXT: .byte 99
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; CHECK-NEXT: .byte 100
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; CHECK-NEXT: .byte 101
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; CHECK-NEXT: .byte 102
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; CHECK-NEXT: .byte 103
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; CHECK-NEXT: .byte 104
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; CHECK-NEXT: .byte 0
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; CHECKOBJ: 00000010 <.rodata.str2.2>:
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; CHECKOBJ-NEXT: 10: 01 08 01 10
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; CHECKOBJ-NEXT: 14: 00 d5 00 00 {{.*}}{{[[:space:]] *}}
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; CHECKOBJ-NEXT: 00000018 <.rodata.str4.4>:
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; CHECKOBJ-NEXT: 18: 00 00 01 d0
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; CHECKOBJ-NEXT: 1c: 00 00 01 d8
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; CHECKOBJ-NEXT: 20: 00 00 01 9d
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; CHECKOBJ-NEXT: 24: 00 00 00 00 {{.*}}{{[[:space:]] *}}
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; CHECKOBJ-NEXT: 00000028 <.rodata.str1.1>:
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; CHECKOBJ-NEXT: 28: 68 65 6c 6c
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; CHECKOBJ-NEXT: 2c: 6f 20 77 6f
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; CHECKOBJ-NEXT: 30: 72 6c 64 21
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; CHECKOBJ-NEXT: 34: 0a 00 61 62
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; CHECKOBJ-NEXT: 38: 63 64 65 66
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; CHECKOBJ-NEXT: 3c: 67 68 00 00
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