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llvm-mirror/test/CodeGen/Thumb2/thumb2-branch.ll
Tim Northover 817190b1e4 ARM: allow predicated barriers in Thumb mode
The barrier instructions are only "always-execute" in ARM mode, they can quite
happily sit inside an IT block in Thumb.

llvm-svn: 184964
2013-06-26 16:52:32 +00:00

75 lines
1.8 KiB
LLVM

; RUN: llc < %s -mtriple=thumbv7-apple-darwin -mattr=+thumb2 | FileCheck %s
; If-conversion defeats the purpose of this test, which is to check
; conditional branch generation, so a call to make sure it doesn't
; happen and we get actual branches.
declare void @foo()
define i32 @f1(i32 %a, i32 %b, i32* %v) {
entry:
; CHECK: f1:
; CHECK: bne LBB
%tmp = icmp eq i32 %a, %b ; <i1> [#uses=1]
br i1 %tmp, label %cond_true, label %return
cond_true: ; preds = %entry
call void @foo()
store i32 0, i32* %v
ret i32 0
return: ; preds = %entry
call void @foo()
ret i32 1
}
define i32 @f2(i32 %a, i32 %b, i32* %v) {
entry:
; CHECK: f2:
; CHECK: bge LBB
%tmp = icmp slt i32 %a, %b ; <i1> [#uses=1]
br i1 %tmp, label %cond_true, label %return
cond_true: ; preds = %entry
call void @foo()
store i32 0, i32* %v
ret i32 0
return: ; preds = %entry
call void @foo()
ret i32 1
}
define i32 @f3(i32 %a, i32 %b, i32* %v) {
entry:
; CHECK: f3:
; CHECK: bhs LBB
%tmp = icmp ult i32 %a, %b ; <i1> [#uses=1]
br i1 %tmp, label %cond_true, label %return
cond_true: ; preds = %entry
call void @foo()
store i32 0, i32* %v
ret i32 0
return: ; preds = %entry
call void @foo()
ret i32 1
}
define i32 @f4(i32 %a, i32 %b, i32* %v) {
entry:
; CHECK: f4:
; CHECK: blo LBB
%tmp = icmp uge i32 %a, %b ; <i1> [#uses=1]
br i1 %tmp, label %cond_true, label %return
cond_true: ; preds = %entry
call void @foo()
store i32 0, i32* %v
ret i32 0
return: ; preds = %entry
call void @foo()
ret i32 1
}