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0dd1f06c83
Repurpose the -amdgpu-function-calls flag. Rather than require it to emit a call, only use it to run the always inline path or not. llvm-svn: 310003
115 lines
4.1 KiB
LLVM
115 lines
4.1 KiB
LLVM
; RUN: llc -mtriple=amdgcn-amd-amdhsa -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,HSA,HSA-NOENV %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa-opencl -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,HSA,HSA-OPENCL %s
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; RUN: llc -mtriple=amdgcn-mesa-mesa3d -verify-machineinstrs < %s | FileCheck -check-prefixes=GCN,MESA %s
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; GCN-LABEL: {{^}}kernel_implicitarg_ptr_empty:
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; GCN: enable_sgpr_kernarg_segment_ptr = 1
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; HSA-NOENV: kernarg_segment_byte_size = 0
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; HSA-OPENCL: kernarg_segment_byte_size = 32
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; MESA: kernarg_segment_byte_size = 16
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; HSA: s_load_dword s0, s[4:5], 0x0
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define amdgpu_kernel void @kernel_implicitarg_ptr_empty() #0 {
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%implicitarg.ptr = call i8 addrspace(2)* @llvm.amdgcn.implicitarg.ptr()
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%cast = bitcast i8 addrspace(2)* %implicitarg.ptr to i32 addrspace(2)*
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%load = load volatile i32, i32 addrspace(2)* %cast
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ret void
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}
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; GCN-LABEL: {{^}}kernel_implicitarg_ptr:
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; GCN: enable_sgpr_kernarg_segment_ptr = 1
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; HSA-NOENV: kernarg_segment_byte_size = 112
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; HSA-OPENCL: kernarg_segment_byte_size = 144
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; MESA: kernarg_segment_byte_size = 464
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; HSA: s_load_dword s0, s[4:5], 0x1c
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define amdgpu_kernel void @kernel_implicitarg_ptr([112 x i8]) #0 {
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%implicitarg.ptr = call i8 addrspace(2)* @llvm.amdgcn.implicitarg.ptr()
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%cast = bitcast i8 addrspace(2)* %implicitarg.ptr to i32 addrspace(2)*
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%load = load volatile i32, i32 addrspace(2)* %cast
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ret void
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}
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; GCN-LABEL: {{^}}func_implicitarg_ptr:
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; GCN: s_waitcnt
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; GCN-NEXT: s_load_dword s{{[0-9]+}}, s[6:7], 0x0{{$}}
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; GCN-NEXT: s_waitcnt
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; GCN-NEXT: s_setpc_b64
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define void @func_implicitarg_ptr() #1 {
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%implicitarg.ptr = call i8 addrspace(2)* @llvm.amdgcn.implicitarg.ptr()
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%cast = bitcast i8 addrspace(2)* %implicitarg.ptr to i32 addrspace(2)*
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%load = load volatile i32, i32 addrspace(2)* %cast
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ret void
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}
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; GCN-LABEL: {{^}}kernel_call_implicitarg_ptr_func_empty:
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; GCN: enable_sgpr_kernarg_segment_ptr = 1
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; HSA-NOENV: kernarg_segment_byte_size = 0
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; HSA-OPENCL: kernarg_segment_byte_size = 32
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; MESA: kernarg_segment_byte_size = 16
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; GCN: s_mov_b64 s[6:7], s[4:5]
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; GCN: s_swappc_b64
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define amdgpu_kernel void @kernel_call_implicitarg_ptr_func_empty() #0 {
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call void @func_implicitarg_ptr()
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ret void
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}
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; GCN-LABEL: {{^}}kernel_call_implicitarg_ptr_func:
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; GCN: enable_sgpr_kernarg_segment_ptr = 1
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; HSA-OPENCL: kernarg_segment_byte_size = 144
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; HSA-NOENV: kernarg_segment_byte_size = 112
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; MESA: kernarg_segment_byte_size = 464
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; HSA: s_add_u32 s6, s4, 0x70
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; MESA: s_add_u32 s6, s4, 0x1c0
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; GCN: s_addc_u32 s7, s5, 0{{$}}
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; GCN: s_swappc_b64
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define amdgpu_kernel void @kernel_call_implicitarg_ptr_func([112 x i8]) #0 {
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call void @func_implicitarg_ptr()
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ret void
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}
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; GCN-LABEL: {{^}}func_call_implicitarg_ptr_func:
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; GCN-NOT: s6
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; GCN-NOT: s7
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; GCN-NOT: s[6:7]
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define void @func_call_implicitarg_ptr_func() #1 {
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call void @func_implicitarg_ptr()
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ret void
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}
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; GCN-LABEL: {{^}}func_kernarg_implicitarg_ptr:
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; GCN: s_waitcnt
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; GCN: s_load_dword s{{[0-9]+}}, s[6:7], 0x0{{$}}
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; GCN: s_load_dword s{{[0-9]+}}, s[8:9], 0x0{{$}}
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define void @func_kernarg_implicitarg_ptr() #1 {
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%kernarg.segment.ptr = call i8 addrspace(2)* @llvm.amdgcn.kernarg.segment.ptr()
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%implicitarg.ptr = call i8 addrspace(2)* @llvm.amdgcn.implicitarg.ptr()
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%cast.kernarg.segment.ptr = bitcast i8 addrspace(2)* %kernarg.segment.ptr to i32 addrspace(2)*
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%cast.implicitarg = bitcast i8 addrspace(2)* %implicitarg.ptr to i32 addrspace(2)*
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%load0 = load volatile i32, i32 addrspace(2)* %cast.kernarg.segment.ptr
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%load1 = load volatile i32, i32 addrspace(2)* %cast.implicitarg
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ret void
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}
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; GCN-LABEL: {{^}}kernel_call_kernarg_implicitarg_ptr_func:
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; GCN: s_mov_b64 s[6:7], s[4:5]
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; HSA: s_add_u32 s8, s6, 0x70
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; MESA: s_add_u32 s8, s6, 0x1c0
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; GCN: s_addc_u32 s9, s7, 0
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; GCN: s_swappc_b64
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define amdgpu_kernel void @kernel_call_kernarg_implicitarg_ptr_func([112 x i8]) #0 {
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call void @func_kernarg_implicitarg_ptr()
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ret void
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}
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declare i8 addrspace(2)* @llvm.amdgcn.implicitarg.ptr() #2
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declare i8 addrspace(2)* @llvm.amdgcn.kernarg.segment.ptr() #2
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attributes #0 = { nounwind noinline }
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attributes #1 = { nounwind noinline }
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attributes #2 = { nounwind readnone speculatable }
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