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8854cc0241
Summary: Changing all mnemonic to match assembly instructions to simplify mnemonic naming rules. This time update all floating-point arithmetic instructions. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D78768
134 lines
3.9 KiB
C++
134 lines
3.9 KiB
C++
//===-- VE.h - Top-level interface for VE representation --------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the entry points for global functions defined in the LLVM
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// VE back-end.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_VE_VE_H
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#define LLVM_LIB_TARGET_VE_VE_H
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#include "MCTargetDesc/VEMCTargetDesc.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Target/TargetMachine.h"
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namespace llvm {
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class FunctionPass;
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class VETargetMachine;
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class formatted_raw_ostream;
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class AsmPrinter;
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class MCInst;
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class MachineInstr;
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FunctionPass *createVEISelDag(VETargetMachine &TM);
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FunctionPass *createVEPromoteToI1Pass();
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void LowerVEMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
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AsmPrinter &AP);
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} // namespace llvm
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namespace llvm {
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// Enums corresponding to VE condition codes, both icc's and fcc's. These
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// values must be kept in sync with the ones in the .td file.
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namespace VECC {
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enum CondCode {
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// Integer comparison
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CC_IG = 0, // Greater
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CC_IL = 1, // Less
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CC_INE = 2, // Not Equal
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CC_IEQ = 3, // Equal
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CC_IGE = 4, // Greater or Equal
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CC_ILE = 5, // Less or Equal
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// Floating point comparison
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CC_AF = 0 + 6, // Never
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CC_G = 1 + 6, // Greater
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CC_L = 2 + 6, // Less
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CC_NE = 3 + 6, // Not Equal
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CC_EQ = 4 + 6, // Equal
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CC_GE = 5 + 6, // Greater or Equal
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CC_LE = 6 + 6, // Less or Equal
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CC_NUM = 7 + 6, // Number
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CC_NAN = 8 + 6, // NaN
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CC_GNAN = 9 + 6, // Greater or NaN
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CC_LNAN = 10 + 6, // Less or NaN
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CC_NENAN = 11 + 6, // Not Equal or NaN
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CC_EQNAN = 12 + 6, // Equal or NaN
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CC_GENAN = 13 + 6, // Greater or Equal or NaN
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CC_LENAN = 14 + 6, // Less or Equal or NaN
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CC_AT = 15 + 6, // Always
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};
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}
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// Enums corresponding to VE Rounding Mode. These values must be kept in
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// sync with the ones in the .td file.
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namespace VERD {
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enum RoundingMode {
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RD_NONE = 0, // According to PSW
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RD_RZ = 8, // Round toward Zero
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RD_RP = 9, // Round toward Plus infinity
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RD_RM = 10, // Round toward Minus infinity
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RD_RN = 11, // Round to Nearest (ties to Even)
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RD_RA = 12, // Round to Nearest (ties to Away)
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UNKNOWN
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};
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}
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inline static const char *VECondCodeToString(VECC::CondCode CC) {
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switch (CC) {
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case VECC::CC_IG: return "gt";
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case VECC::CC_IL: return "lt";
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case VECC::CC_INE: return "ne";
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case VECC::CC_IEQ: return "eq";
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case VECC::CC_IGE: return "ge";
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case VECC::CC_ILE: return "le";
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case VECC::CC_AF: return "af";
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case VECC::CC_G: return "gt";
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case VECC::CC_L: return "lt";
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case VECC::CC_NE: return "ne";
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case VECC::CC_EQ: return "eq";
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case VECC::CC_GE: return "ge";
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case VECC::CC_LE: return "le";
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case VECC::CC_NUM: return "num";
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case VECC::CC_NAN: return "nan";
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case VECC::CC_GNAN: return "gtnan";
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case VECC::CC_LNAN: return "ltnan";
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case VECC::CC_NENAN: return "nenan";
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case VECC::CC_EQNAN: return "eqnan";
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case VECC::CC_GENAN: return "genan";
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case VECC::CC_LENAN: return "lenan";
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case VECC::CC_AT: return "at";
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}
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llvm_unreachable("Invalid cond code");
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}
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inline static const char *VERDToString(VERD::RoundingMode R) {
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switch (R) {
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case VERD::RD_NONE:
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return "";
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case VERD::RD_RZ:
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return ".rz";
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case VERD::RD_RP:
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return ".rp";
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case VERD::RD_RM:
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return ".rm";
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case VERD::RD_RN:
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return ".rn";
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case VERD::RD_RA:
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return ".ra";
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default:
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llvm_unreachable("Invalid branch predicate");
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}
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}
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inline unsigned M0(unsigned Val) { return Val + 64; }
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inline unsigned M1(unsigned Val) { return Val; }
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} // namespace llvm
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#endif
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